Dynamically changeable secure scan architecture against scan-based side channel attack

Research output: Chapter in Book/Report/Conference proceedingConference contribution

27 Citations (Scopus)

Abstract

Scan test which is one of the useful design for testability techniques is effective for LSIs including cryptographic circuit. It can observe and control the internal states of the circuit under test by using scan chain. However, scan chain presents a significant security risk of information leakage for scan-based attacks which retrieves secret keys of cryptographic LSIs. In this paper, a secure scan architecture against scan-based attack which still has high testability is proposed. In our method, scan data is dynamically changed by adding the latch to any FFs in the scan chain. We show that by using proposed method, neither the secret key nor the testability of an RSA circuit implementation is compromised, and the effectiveness of the proposed method.

Original languageEnglish
Title of host publicationISOCC 2012 - 2012 International SoC Design Conference
Pages155-158
Number of pages4
DOIs
Publication statusPublished - 2012 Dec 1
Event2012 International SoC Design Conference, ISOCC 2012 - Jeju Island, Korea, Republic of
Duration: 2012 Nov 42012 Nov 7

Publication series

NameISOCC 2012 - 2012 International SoC Design Conference

Conference

Conference2012 International SoC Design Conference, ISOCC 2012
CountryKorea, Republic of
CityJeju Island
Period12/11/412/11/7

Keywords

  • RSA
  • scan chain
  • scan-based attack
  • secure scan architecture

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Atobe, Y., Shi, Y., Yanagisawa, M., & Togawa, N. (2012). Dynamically changeable secure scan architecture against scan-based side channel attack. In ISOCC 2012 - 2012 International SoC Design Conference (pp. 155-158). [6407063] (ISOCC 2012 - 2012 International SoC Design Conference). https://doi.org/10.1109/ISOCC.2012.6407063