Dynamically changeable secure scan architecture against scan-based side channel attack

Yuta Atobe; Youhua Shi; Masao Yanagisawa; Nozomu Togawa

doi:10.1109/ISOCC.2012.6407063

Dynamically changeable secure scan architecture against scan-based side channel attack

Yuta Atobe^*, Youhua Shi, Masao Yanagisawa, Nozomu Togawa

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

35 Citations (Scopus)

Abstract

Scan test which is one of the useful design for testability techniques is effective for LSIs including cryptographic circuit. It can observe and control the internal states of the circuit under test by using scan chain. However, scan chain presents a significant security risk of information leakage for scan-based attacks which retrieves secret keys of cryptographic LSIs. In this paper, a secure scan architecture against scan-based attack which still has high testability is proposed. In our method, scan data is dynamically changed by adding the latch to any FFs in the scan chain. We show that by using proposed method, neither the secret key nor the testability of an RSA circuit implementation is compromised, and the effectiveness of the proposed method.

Original language	English
Title of host publication	ISOCC 2012 - 2012 International SoC Design Conference
Pages	155-158
Number of pages	4
DOIs	https://doi.org/10.1109/ISOCC.2012.6407063
Publication status	Published - 2012 Dec 1
Event	2012 International SoC Design Conference, ISOCC 2012 - Jeju Island, Korea, Republic of Duration: 2012 Nov 4 → 2012 Nov 7

Publication series

Name	ISOCC 2012 - 2012 International SoC Design Conference

Conference

Conference	2012 International SoC Design Conference, ISOCC 2012
Country/Territory	Korea, Republic of
City	Jeju Island
Period	12/11/4 → 12/11/7

Keywords

RSA
scan chain
scan-based attack
secure scan architecture

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ISOCC.2012.6407063

Cite this

Atobe, Y, Shi, Y , Yanagisawa, M & Togawa, N 2012, Dynamically changeable secure scan architecture against scan-based side channel attack. in ISOCC 2012 - 2012 International SoC Design Conference., 6407063, ISOCC 2012 - 2012 International SoC Design Conference, pp. 155-158, 2012 International SoC Design Conference, ISOCC 2012, Jeju Island, Korea, Republic of, 12/11/4. https://doi.org/10.1109/ISOCC.2012.6407063

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abstract = "Scan test which is one of the useful design for testability techniques is effective for LSIs including cryptographic circuit. It can observe and control the internal states of the circuit under test by using scan chain. However, scan chain presents a significant security risk of information leakage for scan-based attacks which retrieves secret keys of cryptographic LSIs. In this paper, a secure scan architecture against scan-based attack which still has high testability is proposed. In our method, scan data is dynamically changed by adding the latch to any FFs in the scan chain. We show that by using proposed method, neither the secret key nor the testability of an RSA circuit implementation is compromised, and the effectiveness of the proposed method.",

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author = "Yuta Atobe and Youhua Shi and Masao Yanagisawa and Nozomu Togawa",

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AU - Atobe, Yuta

AU - Shi, Youhua

AU - Yanagisawa, Masao

AU - Togawa, Nozomu

PY - 2012/12/1

Y1 - 2012/12/1

N2 - Scan test which is one of the useful design for testability techniques is effective for LSIs including cryptographic circuit. It can observe and control the internal states of the circuit under test by using scan chain. However, scan chain presents a significant security risk of information leakage for scan-based attacks which retrieves secret keys of cryptographic LSIs. In this paper, a secure scan architecture against scan-based attack which still has high testability is proposed. In our method, scan data is dynamically changed by adding the latch to any FFs in the scan chain. We show that by using proposed method, neither the secret key nor the testability of an RSA circuit implementation is compromised, and the effectiveness of the proposed method.

AB - Scan test which is one of the useful design for testability techniques is effective for LSIs including cryptographic circuit. It can observe and control the internal states of the circuit under test by using scan chain. However, scan chain presents a significant security risk of information leakage for scan-based attacks which retrieves secret keys of cryptographic LSIs. In this paper, a secure scan architecture against scan-based attack which still has high testability is proposed. In our method, scan data is dynamically changed by adding the latch to any FFs in the scan chain. We show that by using proposed method, neither the secret key nor the testability of an RSA circuit implementation is compromised, and the effectiveness of the proposed method.

KW - RSA

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KW - scan-based attack

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Dynamically changeable secure scan architecture against scan-based side channel attack

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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