EFFECT OF PRE-ANNEALING IN PREVENTING GATE OXIDE BREAKDOWN VOLTAGE DEGRADATION INDUCED BY POLYSILICON GATE DELINEATION USING ION MILLING.

Noriyoshi Yamauchi, Toshiaki Yachi, Tsutomu Wada

Research output: Contribution to journalArticle

Abstract

Ion milling is one of the promising methods for submicron pattern delineation in VLSI processes because of its potential for extremely small undercutting and high control. In gate electrode delineation using dry etching, degradation of the gate oxide must be avoided. The purpose of this work is to find those ion milling conditions where the gate oxide breakdown voltage is not degraded. Polysilicon gate MOS capacitors were fabricated delineating polysilicon films of various resistance by ion milling, and the breakdown voltage for the MOS capacitors was measured. The degradation was prevented when the polysilicon sheet resistance was lowered by annealing before ion milling.

Original languageEnglish
Pages (from-to)539-540
Number of pages2
JournalJapanese Journal of Applied Physics, Part 2: Letters
Volume22
Issue number8
Publication statusPublished - 1983 Jan 1

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy (miscellaneous)
  • Physics and Astronomy(all)

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