Abstract
This paper presents a proposal for an efficient software CAVLC decoder architecture in H.264/AVC based on level length extraction (LLE). Especially, level-decoding in a CAVLC decoder is addressed. Its features are summarized in two parts: higher efficient pipeline processing of level decoding, and simultaneous multiple calculations of multiple level codes separated from level decoding loop using Single Instruction Multiple data (SIMD) instruction. The former is achieved by separating Level calculation from Level parsing based on the LLE scheme, and removing branch operations in the level decoding loop. These improve the pipelineprocessing efficiency. The latter removes Level calculation from the level decoding loop, and uses multiple Level calculations based on SIMD instruction. The proposed schemes emphasize the software architecture. They are therefore applicable to general computers. Consequently, they can also be integrated with other CAVLC opimization schemes for CoeffToken, TotalZeros, and RunBefore syntax elements. Based on results of evaluation experiments, we confirmed that the improved pipeline processing achieved 22% faster decoding speed compared with the conventional method, which used only the LLE scheme. The SIMD-based Level calculation also achieved a 38% faster decoder than before by integrating with the former part.
Original language | English |
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Article number | 6170067 |
Pages (from-to) | 146-153 |
Number of pages | 8 |
Journal | IEEE Transactions on Consumer Electronics |
Volume | 58 |
Issue number | 1 |
DOIs | |
Publication status | Published - 2012 Feb |
Externally published | Yes |
Keywords
- CAVLC
- H.264/AVC
- Level decoding
- Level length extraction
- Pipeline processing
- SIMD
ASJC Scopus subject areas
- Media Technology
- Electrical and Electronic Engineering