Abstract
Nowadays, increasing emerging application complexity and improvement in process technology have enabled the design of many-core processors with tens to hundreds of cores on a single chip. Photonic Network-on-Chips (PNoCs) have recently been proposed as an alternative approach with high performance-per-watt characteristics for intra-chip communication. While providing large bandwidth through WDM (Wavelength Division Multiplexing), the main design challenge of conventional hybrid PNoC lies in the control layer, which is generally used for path set-up and also for short message communication. In this paper, we propose architecture and design of an efficient router for control and communication in heterogeneous Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC). In addition, we present detailed complexity and performance evaluation of the proposed architecture.
Original language | English |
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Title of host publication | Proceedings - 2015 2nd International Conference on Information Science and Control Engineering, ICISCE 2015 |
Editors | Yun Cheng, Ying Dai, Shaozi Li |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 202-206 |
Number of pages | 5 |
ISBN (Electronic) | 9781467368506 |
DOIs | |
Publication status | Published - 2015 Jan 1 |
Externally published | Yes |
Event | 2015 2nd International Conference on Information Science and Control Engineering, ICISCE 2015 - Shanghai, China Duration: 2015 Apr 24 → 2015 Apr 26 |
Other
Other | 2015 2nd International Conference on Information Science and Control Engineering, ICISCE 2015 |
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Country/Territory | China |
City | Shanghai |
Period | 15/4/24 → 15/4/26 |
Keywords
- Architecture
- Hybrid
- Many-core Systems-on-Chip
- Optical Network-on-Chip
- Path Setting
ASJC Scopus subject areas
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Computer Science(all)