Efficient simulated annealing-based placement algorithm for Island style FPGAs

Runxiao Shi; Lan Ma; Takahiro Watanabe

doi:10.18178/ijmlc.2018.8.6.743

Efficient simulated annealing-based placement algorithm for Island style FPGAs

Runxiao Shi, Lan Ma, Takahiro Watanabe

Graduate School of Information, Production and Systems

Research output: Contribution to journal › Article › peer-review

Abstract

This paper proposes a group-based very fast simulated annealing (GB-VFSA) algorithm to achieve higher-quality placement in a shorter CPU time. We first introduce a temperature-dependent perturbation model based on Cauchy distribution to generate new solutions. Then, we put high-connected blocks into one group and use a group as a unit for placement. In order to avoid premature convergence of the algorithm, multiple potential solutions are used to search the solution space at the same time. The idea "pheromone" which comes from ant colony optimization is used to realize the communication between multiple potential solutions. Experimental results using MCNC beachmarks show that GB-VFSA achieved 23% reduction in CPU time and 3.6% improvement in maximal time delay over traditional simulating annealing algorithm.

Original language	English
Pages (from-to)	542-548
Number of pages	7
Journal	International Journal of Machine Learning and Computing
Volume	8
Issue number	6
DOIs	https://doi.org/10.18178/ijmlc.2018.8.6.743
Publication status	Published - 2018 Dec 1

Keywords

Block group
Island style FPGAs
Placement
Potential solution group
Simulating annealing

ASJC Scopus subject areas

Computer Science Applications
Information Systems and Management
Artificial Intelligence

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