TY - GEN
T1 - EM-X parallel computer
T2 - Proceedings of the 1995 22nd Annual International Symposium on Computer Architecture
AU - Kodama, Yuetsu
AU - Sakane, Hirohumi
AU - Sato, Mitsuhisa
AU - Yamana, Hayato
AU - Sakai, Shuichi
AU - Yamaguchi, Yoshinori
PY - 1995/1/1
Y1 - 1995/1/1
N2 - Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor communication on an execution pipeline with small and simple packets. It can create a packet in one cycle, and receive a packet from the network in the on-chip buffer without interruption. EM-X invokes threads on packet arrival, minimizing the overhead of thread switching. It can tolerate communication latency by using efficient multi-threading and optimizing packet flow of fine grain communication. EM-X also supports the synchronization of two operands, direct remote memory read/write operations and flexible packet scheduling with priority. This paper describes distinctive features of the EM-X architecture and reports the performance of small synthetic programs and larger more realistic programs.
AB - Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor communication on an execution pipeline with small and simple packets. It can create a packet in one cycle, and receive a packet from the network in the on-chip buffer without interruption. EM-X invokes threads on packet arrival, minimizing the overhead of thread switching. It can tolerate communication latency by using efficient multi-threading and optimizing packet flow of fine grain communication. EM-X also supports the synchronization of two operands, direct remote memory read/write operations and flexible packet scheduling with priority. This paper describes distinctive features of the EM-X architecture and reports the performance of small synthetic programs and larger more realistic programs.
UR - http://www.scopus.com/inward/record.url?scp=0029190495&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0029190495&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:0029190495
SN - 0780330005
T3 - Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA
SP - 14
EP - 23
BT - Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA
Y2 - 22 June 1995 through 24 June 1995
ER -