High frame rate and ultra-low delay straight-line detection plays an increasingly important role in highly automated factories that call for straight-line features to achieve swift locations in real scenes. However, vision systems based on CPU/GPU have a fixed delay between image capture and detection, making straight-line detection challenging to reach an ultra-low delay. Achieving detection nearly simultaneous with capture on the same image is considered. This paper proposes (A) an encoding-free incrementing Hough transform and (B) a partially compressed line parameter space to implement a straight-line detection core on an FPGA board. The encoding-free incrementing Hough transform directly calculates line parameters only by incrementing and initialization while capturing an image. Furthermore, the partially compressed line parameter space reduces the required memory resources and the path delay under the premise of accurate vote recordings for every line feature. The evaluation result shows that the proposals achieve as accurate detection (RMSE of θ on 0.0057, and RMSE of p on 2.09) as standard Hough transform (RMSE of θ on 0.0057, and RMSE of p on 2.13) and the designed detection core processes VGA (640 × 480) videos at 1.358 ms/frame delay.