Energy-Efficient and High Performance Approximate Multiplier Using Compressors Based on Input Reordering

Zhenhao Liu, Yi Guo, Xiaoting Sun, Shinji Kimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Today in nanometer regime, approximate circuits have attracted much more attention due to the pursuit of low power consumption and high performance. Approximate multiplier is the key arithmetic function in many error-tolerant applications such as signal processing. In this paper, two approximate compressors based on input reordering logic have been proposed for the partial product reduction in the multiplication. A 2-bit reordering circuit is also designed for the proposed multiplier. Experimental results show that the proposed multiplier sacrifices only a small amount of precision (about 0.58%) to drastically reduce power, area, and delay up to (36.6%), (28.8%) and (20.1%) compared to accurate Wallace multiplier. The proposed multiplier achieves a high signal-to-noise ratio (over 50dB) when applied to an image processing algorithm.

Original languageEnglish
Title of host publicationProceedings of TENCON 2018 - 2018 IEEE Region 10 Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages545-550
Number of pages6
ISBN (Electronic)9781538654576
DOIs
Publication statusPublished - 2019 Feb 22
Event2018 IEEE Region 10 Conference, TENCON 2018 - Jeju, Korea, Republic of
Duration: 2018 Oct 282018 Oct 31

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
Volume2018-October
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Conference

Conference2018 IEEE Region 10 Conference, TENCON 2018
CountryKorea, Republic of
CityJeju
Period18/10/2818/10/31

Keywords

  • approximate multiplier
  • Compressor
  • high performance
  • Input reordering
  • low power

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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  • Cite this

    Liu, Z., Guo, Y., Sun, X., & Kimura, S. (2019). Energy-Efficient and High Performance Approximate Multiplier Using Compressors Based on Input Reordering. In Proceedings of TENCON 2018 - 2018 IEEE Region 10 Conference (pp. 545-550). [8650340] (IEEE Region 10 Annual International Conference, Proceedings/TENCON; Vol. 2018-October). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/TENCON.2018.8650340