Abstract
The state-of-the-art customized accelerators of convolution neural networks (CNN) have achieved high throughput while the huge amount of data movements still remains as the dominant part of the total energy costs. In this paper, we propose an energy-efficient scheduling approach to find an efficient dataflow that minimizes data movements with limited hardware resource budgets. In detail, two-level nested loop transformations are proposed to separate memory and computing resource constraints. This allows us to fully exploit the potential of available memory resources for reducing off-chip memory traffic. Further, the proposed cross-loop model is capable of figuring out the data locality across nested loops in CNN algorithms. Finally, energy-delay production is employed as the evaluation criteria to balancing energy and throughput performance. The experimental results show our cross-loop model can reduce the off-chip data movements by 11-21% and achieve the theoretical optimum. Therefore, the proposed scheduling method can increase the energy efficiency by at least 8.7 times.
Original language | English |
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Title of host publication | IEEE International Symposium on Circuits and Systems |
Subtitle of host publication | From Dreams to Innovation, ISCAS 2017 - Conference Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781467368520 |
DOIs | |
Publication status | Published - 2017 Sep 25 |
Event | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: 2017 May 28 → 2017 May 31 |
Other
Other | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 |
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Country | United States |
City | Baltimore |
Period | 17/5/28 → 17/5/31 |
Keywords
- accelerator
- convolutional neural network
- energy efficiency
- loop tiling
- loop transformation
- memory bandwidth
ASJC Scopus subject areas
- Electrical and Electronic Engineering