ESD protection of RF circuits in standard CMOS process

K. Higashi, A. O. Adan, M. Fukumi, N. Tanba, Toshihiko Yoshimasu, M. Hayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The electro-static discharge (ESD) protection of radio frequency (RF) circuits in standard complementary metal-oxide semiconductor (CMOS) process was discussed. Results showed that the degradation of the radio frequency (RF) characteristics by ESD protection device capacitance CESD depends on the ratio of CESD and input transistor gate capacitance. The parasitic capacitance of the ESD device is reduced to ∼150 fF by using SCR(silicon controlled rectifiers)-based protection device.

Original languageEnglish
Title of host publicationIEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers
Pages285-288
Number of pages4
Publication statusPublished - 2002
Externally publishedYes
Event2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA
Duration: 2002 Jun 22002 Jun 4

Other

Other2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
CitySeatle, WA
Period02/6/202/6/4

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Media Technology

Cite this

Higashi, K., Adan, A. O., Fukumi, M., Tanba, N., Yoshimasu, T., & Hayashi, M. (2002). ESD protection of RF circuits in standard CMOS process. In IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers (pp. 285-288)