ESD protection of RF circuits in standard CMOS process

K. Higashi, A. O. Adan, M. Fukumi, N. Tanba, T. Yoshimasu, M. Hayashi

Research output: Contribution to journalConference article

4 Citations (Scopus)

Abstract

The tradeoffs in the ESD protection device for RFCMOS circuits are described, and the characteristics of an SCR-based ESD structure are presented. The parasitic capacitance of the ESD structure is reduced to ∼150fF. 3kV HBM and 750V CDM are achieved in a LNA working at 2.5GHz with NF<4dB, applicable for Bluetooth wireless transceiver.

Original languageEnglish
Pages (from-to)31-34
Number of pages4
JournalIEEE MTT-S International Microwave Symposium Digest
Volume1
Publication statusPublished - 2002 Jan 1
Externally publishedYes
Event2002 IEEE MTT-S International Microwave Symposium Digest - Seattle, WA, United States
Duration: 2002 Jun 22002 Jun 7

ASJC Scopus subject areas

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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  • Cite this

    Higashi, K., Adan, A. O., Fukumi, M., Tanba, N., Yoshimasu, T., & Hayashi, M. (2002). ESD protection of RF circuits in standard CMOS process. IEEE MTT-S International Microwave Symposium Digest, 1, 31-34.