ESD protection of RF circuits in standard CMOS process

K. Higashi, A. O. Adan, M. Fukumi, N. Tanba, Toshihiko Yoshimasu, M. Hayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

The tradeoffs in the ESD protection device for RFCMOS circuits are described, and the characteristics of an SCR-based ESD structure are presented. The parasitic capacitance of the ESD structure is reduced to ∼150fF. 3kV HBM and 750V CDM are achieved in a LNA working at 2.5GHz with NF<4dB, applicable for Bluetooth wireless transceiver.

Original languageEnglish
Title of host publicationIEEE MTT-S International Microwave Symposium Digest
Pages31-34
Number of pages4
Volume1
Publication statusPublished - 2002
Externally publishedYes
Event2002 IEEE MTT-S International Microwave Symposium Digest - Seattle, WA, United States
Duration: 2002 Jun 22002 Jun 7

Other

Other2002 IEEE MTT-S International Microwave Symposium Digest
CountryUnited States
CitySeattle, WA
Period02/6/202/6/7

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics

Cite this

Higashi, K., Adan, A. O., Fukumi, M., Tanba, N., Yoshimasu, T., & Hayashi, M. (2002). ESD protection of RF circuits in standard CMOS process. In IEEE MTT-S International Microwave Symposium Digest (Vol. 1, pp. 31-34)