Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

Tomohiro Hirano, Hideo Yamamoto, Shuhei Iizuka, Kohei Muto, Takashi Goto, Tamami Wake, Hiroki Mikami, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Reducing power dissipation without performance degradation is one of the most important issues for all computing systems, such as supercomputers, cloud servers, desktop PCs, medical systems, smartphones and wearable devices. Exploiting parallelism, careful frequency-and-voltage control and clock-and-power-gating control for multicore/manycore systems are promising to attain performance improvements and reducing power dissipation. However, the hand parallelization and power reduction of application programs are very difficult and time-consuming. The OSCAR automatic parallelization compiler has been developed to overcome these problems by realizing automatic lowpower control in addition to the parallelization. This paper evaluates performance of the low-power control technology of the OSCAR compiler on Intel Haswell and ARM multicore platforms. The evaluations show that the power consumption is reduced to 2/5 using 3 cores on the Intel Haswell multicore for the H.264 decoder and 1/3 for Optical Flow on 3 cores with the power control compared with 3 cores without power control. On the ARM Cortex-A9 using 3 cores, the power control reduces power consumption to 1/2 with the H.264 decoder and 1/3 with Optical Flow. These show that the OSCAR multi-platform compiler allows us to reduce the power consumption on Intel and ARM multicores.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
PublisherSpringer Verlag
Pages239-252
Number of pages14
Volume8967
ISBN (Print)9783319174723
DOIs
Publication statusPublished - 2015
Event27th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2014 - Hillsboro, United States
Duration: 2014 Sep 152014 Sep 17

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume8967
ISSN (Print)03029743
ISSN (Electronic)16113349

Other

Other27th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2014
CountryUnited States
CityHillsboro
Period14/9/1514/9/17

    Fingerprint

Keywords

  • Automatic parallelization
  • Multicore processor
  • Multiple platforms
  • Power control
  • Power reduction

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

Cite this

Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K., & Kasahara, H. (2015). Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 8967, pp. 239-252). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 8967). Springer Verlag. https://doi.org/10.1007/978-3-319-17473-0_16