Abstract
This paper presents a thread partitioning algorithm for high-level synthesis systems which generate low energy circuits. In the algorithm, we partitions a thread into two sub-threads, one of which has RF and the other does not have RF. The partitioned sub-threads need to be synchronized with each other to keep the data dependency of the original thread. Since the partitioned sub-threads have waiting time for synchronization, gated clocks can be applied to each sub-thread. We achieve 33% energy reduction when we apply our proposed algorithm to a JPEG encoder.
Original language | English |
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Pages | 161-164 |
Number of pages | 4 |
Publication status | Published - 2004 Dec 1 |
Event | 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan, Province of China Duration: 2004 Dec 6 → 2004 Dec 9 |
Conference
Conference | 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology |
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Country/Territory | Taiwan, Province of China |
City | Tainan |
Period | 04/12/6 → 04/12/9 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering