Fabrication of an integrated microprobing head for fault analysis of mos integrated circuits

Shuichi Shoji, Masayoshi Esashi, Tadayuki Matsuo

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

The fabrication of an integrated microprobing head for fault analysis of MOS ICs is described. The micrpoprobe is etched out from a silicon wafer to a tip size of about 10 μm and it has an NMOS impedance transformer intergrated very close to the tip. The input capacitance of this device is smaller than 0.1 pF and the delay time (at 50% of the final value) is lower than 100 ns at a 100 kΩ signal source resitance. This is a significant improvement n the response time of a conventional microprobe.

Original languageEnglish
Pages (from-to)125-132
Number of pages8
JournalSensors and Actuators
Volume14
Issue number2
DOIs
Publication statusPublished - 1988
Externally publishedYes

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Silicon wafers
Integrated circuits
Time delay
Capacitance
Fabrication

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Fabrication of an integrated microprobing head for fault analysis of mos integrated circuits. / Shoji, Shuichi; Esashi, Masayoshi; Matsuo, Tadayuki.

In: Sensors and Actuators, Vol. 14, No. 2, 1988, p. 125-132.

Research output: Contribution to journalArticle

Shoji, Shuichi ; Esashi, Masayoshi ; Matsuo, Tadayuki. / Fabrication of an integrated microprobing head for fault analysis of mos integrated circuits. In: Sensors and Actuators. 1988 ; Vol. 14, No. 2. pp. 125-132.
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