Abstract
This paper describes a new automatic test pattern generation system called FANTCAD which achieves a high fault coverage for full-scan designs. This ATPG system incorporates the latest algorithms for implication, unique path sensitization, and fault simulation. It has been extended for designs which contain bidirectional I/O, buses, scan flip-flops with asynchronous preset/clear, and embedded RAM. FANTCAD has generated test patterns for all testable faults and identified all redundant faults for 150-Kgate designs within four hours per design. This paper also gives experimental results for actual full-scan designs.
Original language | English |
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Pages (from-to) | 167-172 |
Number of pages | 6 |
Journal | Fujitsu Scientific and Technical Journal |
Volume | 31 |
Issue number | 2 |
Publication status | Published - 1995 |
Externally published | Yes |
ASJC Scopus subject areas
- Human-Computer Interaction
- Hardware and Architecture
- Electrical and Electronic Engineering