Fault diagnosis on multiple fault models by using pass/fail information

Yuzo Takamatsu*, Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Koji Yamazaki

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)


In general, we do not know which fault model can explain the cause of the faulty values at the primary outputs in a circuit under test before starting diagnosis. Moreover, under Built-In Self Test (BIST) environment, it is difficult to know which primary output has a faulty value on the application of a failing test pattern. In this paper, we propose an effective diagnosis method on multiple fault models, based on only pass/fail information on the applied test patterns. The proposed method deduces both the fault model and the fault location based on the number of detections for the single stuck-at fault at each line, by performing single stuck-at fault simulation with both passing and failing test patterns. To improve the ability of fault diagnosis, our method uses the logic values of lines and the condition whether the stuck-at faults at the lines are detected or not by passing and failing test patterns. Experimental results show that our method can accurately identify the fault models (stuck-at fault model, AND/OR bridging fault model, dominance bridging fault model, or open fault model) for 90% faulty circuits and that the faulty sites are located within two candidate faults.

Original languageEnglish
Pages (from-to)675-682
Number of pages8
JournalIEICE Transactions on Information and Systems
Issue number3
Publication statusPublished - 2008 Mar
Externally publishedYes


  • Combinational circuits
  • Diagnosis
  • Fault location
  • Fault model
  • Fault simulation
  • Pass/fail information

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence


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