Fault-tolerant photonic network-on-chip

Michael Meyer, Abderazek Ben Abdallah

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Citation (Scopus)

Abstract

Photonic Networks-on-Chip (PNoCs) promise significant advantages over their electronic counterparts. In particular, they offer a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency. However, the major optical device in PNoC systems, microring resonators (MRs), are very sensitive to temperature fluctuation and manufacturing errors. A single MR failure may cause messages to be misdelivered or lost, which results in bandwidth loss or even complete failure of the whole system. This chapter describes a fault-tolerant PNoC architecture. The system is based on a fault-tolerant path-configuration and routing algorithm, a microring fault-resilient photonic router, and uses minimal redundancy to assure accuracy of the packet transmission even after faultyMRs are detected.

Original languageEnglish
Title of host publicationPhotonic Interconnects for Computing Systems
Subtitle of host publicationUnderstanding and Pushing Design Challenges English
PublisherRiver Publishers
Pages281-317
Number of pages37
ISBN (Electronic)9788793519794
ISBN (Print)9788793519800
Publication statusPublished - 2017 Jun 30
Externally publishedYes

ASJC Scopus subject areas

  • Engineering(all)
  • Computer Science(all)

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  • Cite this

    Meyer, M., & Ben Abdallah, A. (2017). Fault-tolerant photonic network-on-chip. In Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges English (pp. 281-317). River Publishers.