Fixed outline multi-bend bus driven floorplanning

Wenxu Sheng, Sheqin Dong, Yuliang Wu, Satoshi Goto

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    Modern hierarchical SOC design flows need to deal with fixed-outline floorplanning under the interconnect constraints, in this paper, we address the problem of bus driven floorplanning in a fixed-outline area. Given a set of blocks, the bus specification, and the height and width of the chip area, a floorplan solution including bus routes and satisfying the outline constraint will be generated with the total floorplan area and total bus area minimized. The approach proposed in this paper is based on a deterministic algorithm Less Flexibility First (LFF), which runs in a fixed-outline area and packs hard blocks one after another with no drawbacks. In our approach, we put no limitation to the shape of the buses, and the processes block-packing and buspacking are proceeding simultaneously. Experiment results show that under the constraint of fixed-outline, we can also obtain a good solution, with less dead space percentage and shorter run time, besides, for large test cases, our algorithm still works well.

    Original languageEnglish
    Title of host publicationProceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
    Pages632-637
    Number of pages6
    DOIs
    Publication statusPublished - 2010
    Event11th International Symposium on Quality Electronic Design, ISQED 2010 - San Jose, CA
    Duration: 2010 Mar 222010 Mar 24

    Other

    Other11th International Symposium on Quality Electronic Design, ISQED 2010
    CitySan Jose, CA
    Period10/3/2210/3/24

    Keywords

    • Bus planning
    • Deterministic algorithm
    • Fixed outline
    • Floorplanning

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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  • Cite this

    Sheng, W., Dong, S., Wu, Y., & Goto, S. (2010). Fixed outline multi-bend bus driven floorplanning. In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010 (pp. 632-637). [5450512] https://doi.org/10.1109/ISQED.2010.5450512