Flexible L1 cache optimization for a low power embedded system

Huatao Zhao, Sijie Yin, Yuxin Sun, Takahiro Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Large power consumption of memory access has been one of the major bottlenecks in modern embedded systems. Because caches even take about half of those systems' power consumption. So it is essential in concentrating on optimized strategies for cache's parameters as well as the enhancement of its adaptability to various applications. Considering the particular applications of embedded systems, we can optimize the caches with configuration parameters such as cache size, line size or associativity. In this paper, we firstly put forward the relations between those cache parameters, and the quantified results establish a new reconfigurable cache structure so as to find the optimal cache parameters rapidly by a searching algorithm. Furthermore, the possible hardware implementation with certain parameters is described, and the effectiveness of this method is verified by experiments using CACTI6.5 and SPEC2006 benchmark on Simple-scalar 3.0e. Experimental results show that the proposed cache can reduce the power consumption to 38.4% of its maximum power consumption caused by the redundant hardware resources.

Original languageEnglish
Title of host publicationProceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2433-2437
Number of pages5
ISBN (Print)9781479925650
Publication statusPublished - 2013
Event2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013 - Shenyang
Duration: 2013 Dec 202013 Dec 22

Other

Other2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013
CityShenyang
Period13/12/2013/12/22

Fingerprint

Embedded systems
Electric power utilization
Hardware
Data storage equipment
Experiments

Keywords

  • Embedded system
  • Low power
  • Optimized cache
  • Reconfiguration

ASJC Scopus subject areas

  • Computer Science(all)
  • Engineering(all)

Cite this

Zhao, H., Yin, S., Sun, Y., & Watanabe, T. (2013). Flexible L1 cache optimization for a low power embedded system. In Proceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013 (pp. 2433-2437). [6885444] Institute of Electrical and Electronics Engineers Inc..

Flexible L1 cache optimization for a low power embedded system. / Zhao, Huatao; Yin, Sijie; Sun, Yuxin; Watanabe, Takahiro.

Proceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013. Institute of Electrical and Electronics Engineers Inc., 2013. p. 2433-2437 6885444.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhao, H, Yin, S, Sun, Y & Watanabe, T 2013, Flexible L1 cache optimization for a low power embedded system. in Proceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013., 6885444, Institute of Electrical and Electronics Engineers Inc., pp. 2433-2437, 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013, Shenyang, 13/12/20.
Zhao H, Yin S, Sun Y, Watanabe T. Flexible L1 cache optimization for a low power embedded system. In Proceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013. Institute of Electrical and Electronics Engineers Inc. 2013. p. 2433-2437. 6885444
Zhao, Huatao ; Yin, Sijie ; Sun, Yuxin ; Watanabe, Takahiro. / Flexible L1 cache optimization for a low power embedded system. Proceedings - 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer, MEC 2013. Institute of Electrical and Electronics Engineers Inc., 2013. pp. 2433-2437
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