Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications

Yong Ju Suh; Jiangtao Sun; Koji Horie; Nobuyuki Itoh; Toshihiko Yoshimasu

doi:10.1109/APMC.2009.5384529

Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications

Yong Ju Suh, Jiangtao Sun, Koji Horie, Nobuyuki Itoh, Toshihiko Yoshimasu

Graduate School of Information, Production and Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

A fully integrated novel power amplifier (PA) using 130nm CMOS process is presented for Electric Toll Collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4dB at P1dB of 13.4dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.

Original language	English
Title of host publication	APMC 2009 - Asia Pacific Microwave Conference 2009
Pages	365-368
Number of pages	4
DOIs	https://doi.org/10.1109/APMC.2009.5384529
Publication status	Published - 2009 Dec 1
Event	Asia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore Duration: 2009 Dec 7 → 2009 Dec 10

Publication series

Name	APMC 2009 - Asia Pacific Microwave Conference 2009

Conference

Conference	Asia Pacific Microwave Conference 2009, APMC 2009
Country	Singapore
City	Singapore
Period	09/12/7 → 09/12/10

Keywords

CMOS
Electric toll collection
High efficiency
Power amplifier

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/APMC.2009.5384529

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Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications. / Suh, Yong Ju; Sun, Jiangtao; Horie, Koji; Itoh, Nobuyuki; Yoshimasu, Toshihiko.

APMC 2009 - Asia Pacific Microwave Conference 2009. 2009. p. 365-368 5384529 (APMC 2009 - Asia Pacific Microwave Conference 2009).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Suh, YJ, Sun, J, Horie, K, Itoh, N & Yoshimasu, T 2009, Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications. in APMC 2009 - Asia Pacific Microwave Conference 2009., 5384529, APMC 2009 - Asia Pacific Microwave Conference 2009, pp. 365-368, Asia Pacific Microwave Conference 2009, APMC 2009, Singapore, Singapore, 09/12/7. https://doi.org/10.1109/APMC.2009.5384529

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abstract = "A fully integrated novel power amplifier (PA) using 130nm CMOS process is presented for Electric Toll Collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4dB at P1dB of 13.4dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.",

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