Fully utilized and low design effort architecture for H.264/AVC intra predictor generation

Yiqing Huang, Qin Liu, Takeshi Ikenaga

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Fully exploiting the spatial feature of image makes H.264/ AVC standard superior in intra prediction part. However, when hardware is considered, full support of all intra modes will cause high design effort, especially for large image size. In this paper, we propose a low design effort solution for intra predictor generation, which is the most significant part in intra engine. Firstly, one parallel processing flow is given out, which achieves 37.5% reduction of processing time. Secondly, a fully utilized predictor generation architecture is given out, which saves 77.5% cycles of original one. With 30.11k gates at 200MHz, our design can support full-mode intra prediction for real-time processing of 4k×2k@60fps.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Pages737-742
Number of pages6
Volume5916 LNCS
DOIs
Publication statusPublished - 2009
Event16th International Multimedia Modeling Conference on Advances in Multimedia Modeling, MMM 2010 - Chongqing
Duration: 2010 Oct 62010 Oct 8

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5916 LNCS
ISSN (Print)03029743
ISSN (Electronic)16113349

Other

Other16th International Multimedia Modeling Conference on Advances in Multimedia Modeling, MMM 2010
CityChongqing
Period10/10/610/10/8

Fingerprint

Intra Prediction
Predictors
Processing
Parallel Processing
Engine
Hardware
Engines
Real-time
Cycle
Design
Architecture
Standards

Keywords

  • H.264/AVC
  • Hardware Architecture
  • Intra Prediction

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

Cite this

Huang, Y., Liu, Q., & Ikenaga, T. (2009). Fully utilized and low design effort architecture for H.264/AVC intra predictor generation. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5916 LNCS, pp. 737-742). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 5916 LNCS). https://doi.org/10.1007/978-3-642-11301-7_78

Fully utilized and low design effort architecture for H.264/AVC intra predictor generation. / Huang, Yiqing; Liu, Qin; Ikenaga, Takeshi.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5916 LNCS 2009. p. 737-742 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 5916 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Huang, Y, Liu, Q & Ikenaga, T 2009, Fully utilized and low design effort architecture for H.264/AVC intra predictor generation. in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). vol. 5916 LNCS, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 5916 LNCS, pp. 737-742, 16th International Multimedia Modeling Conference on Advances in Multimedia Modeling, MMM 2010, Chongqing, 10/10/6. https://doi.org/10.1007/978-3-642-11301-7_78
Huang Y, Liu Q, Ikenaga T. Fully utilized and low design effort architecture for H.264/AVC intra predictor generation. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5916 LNCS. 2009. p. 737-742. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). https://doi.org/10.1007/978-3-642-11301-7_78
Huang, Yiqing ; Liu, Qin ; Ikenaga, Takeshi. / Fully utilized and low design effort architecture for H.264/AVC intra predictor generation. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5916 LNCS 2009. pp. 737-742 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
@inproceedings{5c095fd430cc4472843bfcf246154f56,
title = "Fully utilized and low design effort architecture for H.264/AVC intra predictor generation",
abstract = "Fully exploiting the spatial feature of image makes H.264/ AVC standard superior in intra prediction part. However, when hardware is considered, full support of all intra modes will cause high design effort, especially for large image size. In this paper, we propose a low design effort solution for intra predictor generation, which is the most significant part in intra engine. Firstly, one parallel processing flow is given out, which achieves 37.5{\%} reduction of processing time. Secondly, a fully utilized predictor generation architecture is given out, which saves 77.5{\%} cycles of original one. With 30.11k gates at 200MHz, our design can support full-mode intra prediction for real-time processing of 4k×2k@60fps.",
keywords = "H.264/AVC, Hardware Architecture, Intra Prediction",
author = "Yiqing Huang and Qin Liu and Takeshi Ikenaga",
year = "2009",
doi = "10.1007/978-3-642-11301-7_78",
language = "English",
isbn = "3642113001",
volume = "5916 LNCS",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
pages = "737--742",
booktitle = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

}

TY - GEN

T1 - Fully utilized and low design effort architecture for H.264/AVC intra predictor generation

AU - Huang, Yiqing

AU - Liu, Qin

AU - Ikenaga, Takeshi

PY - 2009

Y1 - 2009

N2 - Fully exploiting the spatial feature of image makes H.264/ AVC standard superior in intra prediction part. However, when hardware is considered, full support of all intra modes will cause high design effort, especially for large image size. In this paper, we propose a low design effort solution for intra predictor generation, which is the most significant part in intra engine. Firstly, one parallel processing flow is given out, which achieves 37.5% reduction of processing time. Secondly, a fully utilized predictor generation architecture is given out, which saves 77.5% cycles of original one. With 30.11k gates at 200MHz, our design can support full-mode intra prediction for real-time processing of 4k×2k@60fps.

AB - Fully exploiting the spatial feature of image makes H.264/ AVC standard superior in intra prediction part. However, when hardware is considered, full support of all intra modes will cause high design effort, especially for large image size. In this paper, we propose a low design effort solution for intra predictor generation, which is the most significant part in intra engine. Firstly, one parallel processing flow is given out, which achieves 37.5% reduction of processing time. Secondly, a fully utilized predictor generation architecture is given out, which saves 77.5% cycles of original one. With 30.11k gates at 200MHz, our design can support full-mode intra prediction for real-time processing of 4k×2k@60fps.

KW - H.264/AVC

KW - Hardware Architecture

KW - Intra Prediction

UR - http://www.scopus.com/inward/record.url?scp=77249113242&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77249113242&partnerID=8YFLogxK

U2 - 10.1007/978-3-642-11301-7_78

DO - 10.1007/978-3-642-11301-7_78

M3 - Conference contribution

SN - 3642113001

SN - 9783642113000

VL - 5916 LNCS

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 737

EP - 742

BT - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

ER -