Abstract
The authors present the gate capacitance characteristics of the gate/N/sup -/ overlap LDD (lightly doped drain) transistor. The gate capacitance was directly measured by a four-terminal method, using an LCR meter. The measured results for the overlap LDD were compared with those for the single drain and the LDD structure. It was demonstrated that the gate/drain capacitance for the overlap LDD is smaller than that for the single drain and as small as that for the LDD in spite of the large overlap length between the gate and the N/sup -/ region. This result was also confirmed by simulation, which indicates that the small gate/drain capacitance of the overlap LDD is due to the depletion of the N/sup -/ drain under the gate by the normal electric field from the gate and the lateral electric field at the drain.
| Original language | English |
|---|---|
| Title of host publication | International Electron Devices Meeting 1991, IEDM 1991 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 371-374 |
| Number of pages | 4 |
| Volume | 1991-January |
| ISBN (Electronic) | 0780302435 |
| DOIs | |
| Publication status | Published - 1991 |
| Externally published | Yes |
| Event | International Electron Devices Meeting, IEDM 1991 - Washington, United States Duration: 1991 Dec 8 → 1991 Dec 11 |
Other
| Other | International Electron Devices Meeting, IEDM 1991 |
|---|---|
| Country/Territory | United States |
| City | Washington |
| Period | 91/12/8 → 91/12/11 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Condensed Matter Physics
- Electronic, Optical and Magnetic Materials
- Materials Chemistry