Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

S. Shimizu, T. Kuroi, H. Sayama, A. Furukawa, Y. Nishida, Y. Inoue, Masahide Inuishi, T. Nishimura

Research output: Contribution to journalArticle

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Abstract

Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18 μm in CMOS is demonstrated with high performance and high reliability.

Original languageEnglish
Pages (from-to)107-108
Number of pages2
JournalUnknown Journal
Publication statusPublished - 1997
Externally publishedYes

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Shimizu, S., Kuroi, T., Sayama, H., Furukawa, A., Nishida, Y., Inoue, Y., Inuishi, M., & Nishimura, T. (1997). Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS. Unknown Journal, 107-108.