Global router for analog function blocks based on the branch-and-bound algorithm

Tadanao Tsubota, Masahiro Kawakita, Takahiro Watanabe

Research output: Contribution to journalArticle

Abstract

A method based on the branch-and-bound algorithm capable of generating all possible solutions to find the best one is proposed for analog function blocks. Since the method has some drawbacks, constraints are classified into two groups; constraints on single side and constraints between two nets. Thus, the method has two parts; (a) only constraints on single nets are processed and (b) only constraints between two nets are processed. Due to the fact that many possible routes that violate layout constraints are rejected immediately in each part, the method can be efficient. In fact, experimental results indicate that the proposed method is capable of finding a good global route for hard layout constraints in practical processing time and also show that it is superior to the well-known simulated annealing method in quality of solutions and in processing time.

Original languageEnglish
Pages (from-to)345-351
Number of pages7
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE78-A
Issue number3
Publication statusPublished - 1995 Mar
Externally publishedYes

Fingerprint

Branch and Bound Algorithm
Router
Routers
Analogue
Processing
Simulated annealing
Layout
Violate
Simulated Annealing
Immediately
Experimental Results

ASJC Scopus subject areas

  • Hardware and Architecture
  • Information Systems
  • Electrical and Electronic Engineering

Cite this

Global router for analog function blocks based on the branch-and-bound algorithm. / Tsubota, Tadanao; Kawakita, Masahiro; Watanabe, Takahiro.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E78-A, No. 3, 03.1995, p. 345-351.

Research output: Contribution to journalArticle

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