GRAPH THEORETICAL COMPACTION ALGORITHM.

Takeshi Yoshimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

An LSI compaction method which minimizes total wire length as well as layout area is discussed. First, the compaction problem is formulated as a linear programming problem and reduced to a problem involving finding a tree which has some properties in a constraint graph. Then, a method which finds the tree by a sequence of elementary tree transformations in the graph is proposed. It corresponds to the primal simplex method for LP. However, the proposed method is much more efficient, because it does not deal with any matrices in solving the problem.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE
Pages1455-1458
Number of pages4
Publication statusPublished - 1985
Externally publishedYes

Fingerprint

Compaction
Linear programming
Wire

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Yoshimura, T. (1985). GRAPH THEORETICAL COMPACTION ALGORITHM. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 1455-1458). IEEE.

GRAPH THEORETICAL COMPACTION ALGORITHM. / Yoshimura, Takeshi.

Proceedings - IEEE International Symposium on Circuits and Systems. IEEE, 1985. p. 1455-1458.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yoshimura, T 1985, GRAPH THEORETICAL COMPACTION ALGORITHM. in Proceedings - IEEE International Symposium on Circuits and Systems. IEEE, pp. 1455-1458.
Yoshimura T. GRAPH THEORETICAL COMPACTION ALGORITHM. In Proceedings - IEEE International Symposium on Circuits and Systems. IEEE. 1985. p. 1455-1458
Yoshimura, Takeshi. / GRAPH THEORETICAL COMPACTION ALGORITHM. Proceedings - IEEE International Symposium on Circuits and Systems. IEEE, 1985. pp. 1455-1458
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