Hardware-assisted reliability enhancement for embedded multi-core virtualization design

Tsung Han Lin, Yuki Kinebuchi, Hiromasa Shimada, Hitoshi Mitake, Chen Yi Lee, Tatsuo Nakajima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In this paper, we propose a virtualization architecture for the multi-core embedded system to provide more sys- tem reliability and security while maintaining the same per- formance without introducing additional special hardware supports or having to implement complex protection mech- anism in the virtualization layer. Embedded virtualization design usually uses two kinds of approaches, traditional VMM and microkernel approaches, but both of them suffer from performance or engineering cost problems. To achieve better reliability and keep the virtualization layer design lightweighted, a common hardware component called local memory adopted in the multi-core embedded processors is used in this work. By taking this memory ar- chitecture's advantage, we can mitigate above-mentioned problems at once. We choose to re-map the virtualization layer's program called SPUMONE, which it runs all its guest systems in kernel space, on the local memory. By doing so, it can provide additional reliability and security for the entire system because the SPUMONE's design in a multi-core platform has each instance being installed on a separated processor core, which is different from the tradi- tional virtualization layer design, and therefore the content of each SPUMONE in the local memory is inaccessible to each others.

Original languageEnglish
Title of host publicationProceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011
Pages101-105
Number of pages5
DOIs
Publication statusPublished - 2011 Dec 1
Event1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Co-located with the 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2011 - Toyama, Japan
Duration: 2011 Aug 282011 Aug 31

Publication series

NameProceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011
Volume2

Conference

Conference1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Co-located with the 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2011
CountryJapan
CityToyama
Period11/8/2811/8/31

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Networks and Communications

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  • Cite this

    Lin, T. H., Kinebuchi, Y., Shimada, H., Mitake, H., Lee, C. Y., & Nakajima, T. (2011). Hardware-assisted reliability enhancement for embedded multi-core virtualization design. In Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011 (pp. 101-105). [602999] (Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011; Vol. 2). https://doi.org/10.1109/RTCSA.2011.24