Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems

Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In the field of embedded systems, where ever-growing demands for short time-to-market, low cost, low power, high performance and increased flexibility are prevalent, modern FPGAs (Field Programmable Gate Arrays) are gaining wider popularity in a variety of applications. Moreover, capability of DPR (Dynamic Partial Reconfiguration) found in some of these devices can further help in meeting these demands. With the increasing trend to integrate multiple functions into a single device, programming difficulty, well known for FPGAs, and the complexity of management of dynamically reconfigurable resources drive the need for an OS (Operating System). The OS would provide a well-defined computing model abstracting details and capacity of the underlying hardware. This paper familiarizes the readers with the topic of DPR, pointing out its advantages and limitations, and a related HW (hardware) multitasking computing model. Furthermore, it presents results of an ongoing research on an efficient hardware platform for HW multitasking and an accompanying OS extension which facilitates its programmability and serves as a base for fully fledged DPR embedded systems.

Original languageEnglish
Title of host publication2011 International SoC Design Conference, ISOCC 2011
PublisherIEEE Computer Society
Pages183-186
Number of pages4
ISBN (Print)9781457707100
DOIs
Publication statusPublished - 2011
Event8th International SoC Design Conference 2011, ISOCC 2011 - Jeju, Korea, Republic of
Duration: 2011 Nov 172011 Nov 18

Publication series

Name2011 International SoC Design Conference, ISOCC 2011

Conference

Conference8th International SoC Design Conference 2011, ISOCC 2011
CountryKorea, Republic of
CityJeju
Period11/11/1711/11/18

Keywords

  • Dynamic reconfiguration
  • FPGA
  • Runtime reconfiguration

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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