Hardware Trojan detection and classification based on steady state learning

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)

    Abstract

    In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them.

    Original languageEnglish
    Title of host publication2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages215-220
    Number of pages6
    ISBN (Electronic)9781538603512
    DOIs
    Publication statusPublished - 2017 Sep 19
    Event23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017 - Thessaloniki, Greece
    Duration: 2017 Jul 32017 Jul 5

    Other

    Other23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017
    CountryGreece
    CityThessaloniki
    Period17/7/317/7/5

    Fingerprint

    Testing
    Networks (circuits)
    Hardware security

    Keywords

    • Gate-level netlist
    • Hardware Trojans
    • Logic test
    • Signal transition
    • Steady state

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Safety, Risk, Reliability and Quality
    • Computer Networks and Communications
    • Hardware and Architecture
    • Control and Systems Engineering

    Cite this

    Oya, M., Yanagisawa, M., & Togawa, N. (2017). Hardware Trojan detection and classification based on steady state learning. In 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017 (pp. 215-220). [8046225] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IOLTS.2017.8046225

    Hardware Trojan detection and classification based on steady state learning. / Oya, Masaru; Yanagisawa, Masao; Togawa, Nozomu.

    2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 215-220 8046225.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Oya, M, Yanagisawa, M & Togawa, N 2017, Hardware Trojan detection and classification based on steady state learning. in 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017., 8046225, Institute of Electrical and Electronics Engineers Inc., pp. 215-220, 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, 17/7/3. https://doi.org/10.1109/IOLTS.2017.8046225
    Oya M, Yanagisawa M, Togawa N. Hardware Trojan detection and classification based on steady state learning. In 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. 215-220. 8046225 https://doi.org/10.1109/IOLTS.2017.8046225
    Oya, Masaru ; Yanagisawa, Masao ; Togawa, Nozomu. / Hardware Trojan detection and classification based on steady state learning. 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 215-220
    @inproceedings{8490e1c0f3c54f9b83f11325b97a29e9,
    title = "Hardware Trojan detection and classification based on steady state learning",
    abstract = "In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them.",
    keywords = "Gate-level netlist, Hardware Trojans, Logic test, Signal transition, Steady state",
    author = "Masaru Oya and Masao Yanagisawa and Nozomu Togawa",
    year = "2017",
    month = "9",
    day = "19",
    doi = "10.1109/IOLTS.2017.8046225",
    language = "English",
    pages = "215--220",
    booktitle = "2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    address = "United States",

    }

    TY - GEN

    T1 - Hardware Trojan detection and classification based on steady state learning

    AU - Oya, Masaru

    AU - Yanagisawa, Masao

    AU - Togawa, Nozomu

    PY - 2017/9/19

    Y1 - 2017/9/19

    N2 - In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them.

    AB - In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them.

    KW - Gate-level netlist

    KW - Hardware Trojans

    KW - Logic test

    KW - Signal transition

    KW - Steady state

    UR - http://www.scopus.com/inward/record.url?scp=85032736146&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=85032736146&partnerID=8YFLogxK

    U2 - 10.1109/IOLTS.2017.8046225

    DO - 10.1109/IOLTS.2017.8046225

    M3 - Conference contribution

    AN - SCOPUS:85032736146

    SP - 215

    EP - 220

    BT - 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017

    PB - Institute of Electrical and Electronics Engineers Inc.

    ER -