High parallel variation banyan network based permutation network for reconfigurable LDPC decoder

Xiao Peng; Zhixiang Chen; Xiongxin Zhao; Fumiaki Maehara; Satoshi Goto

doi:10.1109/ASAP.2010.5540964

High parallel variation banyan network based permutation network for reconfigurable LDPC decoder

Xiao Peng^*, Zhixiang Chen, Xiongxin Zhao, Fumiaki Maehara, Satoshi Goto

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

12 Citations (Scopus)

Abstract

Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. In this paper, we propose the variation Banyan network (VBN) based permutation network architecture for the reconfigurable QC-LDPC decoders and give the control signal generating algorithm for cyclic shift. Through introducing the bypass network, we put forward the nonblocking scheme for any input number and shift number. In addition, the optimized VBN is proposed for WiMAX and WiFi standard, which can shift at most 4 groups of input data, and greatly reduce the hardware complexity. The synthesis results using the 90nm technology demonstrate that the proposed permutation network can be implemented with the gate count of 18.3k and the frequency of 600 MHz.

Original language	English
Title of host publication	ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings
Pages	233-238
Number of pages	6
DOIs	https://doi.org/10.1109/ASAP.2010.5540964
Publication status	Published - 2010 Aug 27
Event	21st IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2010 - Rennes, France Duration: 2010 Jul 7 → 2010 Jul 9

Publication series

Name	Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)	1063-6862

Conference

Conference	21st IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2010
Country/Territory	France
City	Rennes
Period	10/7/7 → 10/7/9

Keywords

Banyan network
LDPC decoder
Permutation
Reconfigurable

ASJC Scopus subject areas

Hardware and Architecture
Computer Networks and Communications

Access to Document

10.1109/ASAP.2010.5540964

Cite this

Peng, X., Chen, Z., Zhao, X., Maehara, F., & Goto, S. (2010). High parallel variation banyan network based permutation network for reconfigurable LDPC decoder. In ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings (pp. 233-238). [5540964] (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors). https://doi.org/10.1109/ASAP.2010.5540964

High parallel variation banyan network based permutation network for reconfigurable LDPC decoder. / Peng, Xiao; Chen, Zhixiang; Zhao, Xiongxin et al.

ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings. 2010. p. 233-238 5540964 (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Peng, X, Chen, Z, Zhao, X, Maehara, F & Goto, S 2010, High parallel variation banyan network based permutation network for reconfigurable LDPC decoder. in ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings., 5540964, Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, pp. 233-238, 21st IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2010, Rennes, France, 10/7/7. https://doi.org/10.1109/ASAP.2010.5540964

Peng X, Chen Z, Zhao X, Maehara F, Goto S. High parallel variation banyan network based permutation network for reconfigurable LDPC decoder. In ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings. 2010. p. 233-238. 5540964. (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors). doi: 10.1109/ASAP.2010.5540964

Peng, Xiao ; Chen, Zhixiang ; Zhao, Xiongxin et al. / High parallel variation banyan network based permutation network for reconfigurable LDPC decoder. ASAP 10 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, Conference Proceedings. 2010. pp. 233-238 (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

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title = "High parallel variation banyan network based permutation network for reconfigurable LDPC decoder",

abstract = "Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. In this paper, we propose the variation Banyan network (VBN) based permutation network architecture for the reconfigurable QC-LDPC decoders and give the control signal generating algorithm for cyclic shift. Through introducing the bypass network, we put forward the nonblocking scheme for any input number and shift number. In addition, the optimized VBN is proposed for WiMAX and WiFi standard, which can shift at most 4 groups of input data, and greatly reduce the hardware complexity. The synthesis results using the 90nm technology demonstrate that the proposed permutation network can be implemented with the gate count of 18.3k and the frequency of 600 MHz.",

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N2 - Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. In this paper, we propose the variation Banyan network (VBN) based permutation network architecture for the reconfigurable QC-LDPC decoders and give the control signal generating algorithm for cyclic shift. Through introducing the bypass network, we put forward the nonblocking scheme for any input number and shift number. In addition, the optimized VBN is proposed for WiMAX and WiFi standard, which can shift at most 4 groups of input data, and greatly reduce the hardware complexity. The synthesis results using the 90nm technology demonstrate that the proposed permutation network can be implemented with the gate count of 18.3k and the frequency of 600 MHz.

AB - Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. In this paper, we propose the variation Banyan network (VBN) based permutation network architecture for the reconfigurable QC-LDPC decoders and give the control signal generating algorithm for cyclic shift. Through introducing the bypass network, we put forward the nonblocking scheme for any input number and shift number. In addition, the optimized VBN is proposed for WiMAX and WiFi standard, which can shift at most 4 groups of input data, and greatly reduce the hardware complexity. The synthesis results using the 90nm technology demonstrate that the proposed permutation network can be implemented with the gate count of 18.3k and the frequency of 600 MHz.

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High parallel variation banyan network based permutation network for reconfigurable LDPC decoder

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Keywords

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