High-performance H.264/AVC intra-prediction architecture for ultra high definition video applications

Gang He, Dajiang Zhou, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

Research output: Contribution to journalArticle

7 Citations (Scopus)

Abstract

This paper presents an H.264/AVC intra-prediction design for ultrahigh definition (ultra-HD) video. Due to the huge throughput requirements of ultra-HD, design challenges such as complexity and data dependency, which currently exist for lower resolutions, become even more critical. To solve these problems, we first propose an interlaced block reordering scheme together with a preliminary mode decision (PMD) strategy to resolve the data dependency between intra mode decision and reconstruction. In the meantime, hardware cost is reduced by PMD. We also propose a probability-based reconstruction scheme to solve the problem of long pipeline latency. In addition, hardware reuse strategies including a shared fine decision module and processing element-reusable prediction generator, are applied to further optimize the design. As a result, the hardware complexity is reduced by 77% in terms of area and frequency, and it takes an average of 33 cycles to process a macroblock. The implementation result demonstrates that our design can support up to the specification of 7680$\,\times\,$4320p 60 f/s when running at 273 MHz. The design is implemented with 451.5 k gates in 65-nm CMOS.

Original languageEnglish
Article number6421009
Pages (from-to)76-89
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume22
Issue number1
DOIs
Publication statusPublished - 2014 Jan

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Hardware
Pipelines
Throughput
Specifications
Processing
Costs

Keywords

  • Data dependency
  • H.264/AVC
  • hardware architecture
  • intra prediction

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Software

Cite this

High-performance H.264/AVC intra-prediction architecture for ultra high definition video applications. / He, Gang; Zhou, Dajiang; Fei, Wei; Chen, Zhixiang; Zhou, Jinjia; Goto, Satoshi.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 1, 6421009, 01.2014, p. 76-89.

Research output: Contribution to journalArticle

He, Gang ; Zhou, Dajiang ; Fei, Wei ; Chen, Zhixiang ; Zhou, Jinjia ; Goto, Satoshi. / High-performance H.264/AVC intra-prediction architecture for ultra high definition video applications. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2014 ; Vol. 22, No. 1. pp. 76-89.
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