High performance networks on chip architecture with a new routing strategy for neural network

Yiping Dong, Zhen Lin, Takahiro Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Hardware implementation by Networks on Chip (NoC) for Artificial Neural Network (ANN) was proposed to improve. In this work, a new architecture of NoC which has a hardware implementation of routing algorithm is proposed for ANN design. This routing strategy could reduce the packet size of header. The NOXIM NoC simulator is used to simulate the proposed system in term of latency, throughput and power consumption. The experimental results indicate that the proposed new NoC architecture is effective in increasing throughput and reducing latency and power consumption, compare with the traditional one. The ANN with the new NoC architecture could achieve higher performance and lower communication load.

Original languageEnglish
Title of host publicationPrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics
Pages347-350
Number of pages4
DOIs
Publication statusPublished - 2010 Dec 20
Event2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010 - Shanghai, China
Duration: 2010 Sep 222010 Sep 24

Publication series

NamePrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

Conference

Conference2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010
CountryChina
CityShanghai
Period10/9/2210/9/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Dong, Y., Lin, Z., & Watanabe, T. (2010). High performance networks on chip architecture with a new routing strategy for neural network. In PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (pp. 347-350). [5604890] (PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics). https://doi.org/10.1109/PRIMEASIA.2010.5604890