High speed large capacity inverter for power system apparatus

Akira Nakamori, Naoya Eguchi, Yosuke Nakanishi

Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

10 Citations (Scopus)

Abstract

A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.

Original languageEnglish
Title of host publicationProceedings of the IEEE Conference on Decision and Control
Editors Anon
Pages4472-4473
Number of pages2
Volume4
Publication statusPublished - 1996
Externally publishedYes
EventProceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4) - Kobe, Jpn
Duration: 1996 Dec 111996 Dec 13

Other

OtherProceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4)
CityKobe, Jpn
Period96/12/1196/12/13

Fingerprint

Insulated gate bipolar transistors (IGBT)
Control systems
Networks (circuits)
Computer simulation
Electric potential

ASJC Scopus subject areas

  • Chemical Health and Safety
  • Control and Systems Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Nakamori, A., Eguchi, N., & Nakanishi, Y. (1996). High speed large capacity inverter for power system apparatus. In Anon (Ed.), Proceedings of the IEEE Conference on Decision and Control (Vol. 4, pp. 4472-4473)

High speed large capacity inverter for power system apparatus. / Nakamori, Akira; Eguchi, Naoya; Nakanishi, Yosuke.

Proceedings of the IEEE Conference on Decision and Control. ed. / Anon. Vol. 4 1996. p. 4472-4473.

Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

Nakamori, A, Eguchi, N & Nakanishi, Y 1996, High speed large capacity inverter for power system apparatus. in Anon (ed.), Proceedings of the IEEE Conference on Decision and Control. vol. 4, pp. 4472-4473, Proceedings of the 35th IEEE Conference on Decision and Control. Part 4 (of 4), Kobe, Jpn, 96/12/11.
Nakamori A, Eguchi N, Nakanishi Y. High speed large capacity inverter for power system apparatus. In Anon, editor, Proceedings of the IEEE Conference on Decision and Control. Vol. 4. 1996. p. 4472-4473
Nakamori, Akira ; Eguchi, Naoya ; Nakanishi, Yosuke. / High speed large capacity inverter for power system apparatus. Proceedings of the IEEE Conference on Decision and Control. editor / Anon. Vol. 4 1996. pp. 4472-4473
@inbook{844645aea7c6439bbfc95d7956e5a2d1,
title = "High speed large capacity inverter for power system apparatus",
abstract = "A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.",
author = "Akira Nakamori and Naoya Eguchi and Yosuke Nakanishi",
year = "1996",
language = "English",
volume = "4",
pages = "4472--4473",
editor = "Anon",
booktitle = "Proceedings of the IEEE Conference on Decision and Control",

}

TY - CHAP

T1 - High speed large capacity inverter for power system apparatus

AU - Nakamori, Akira

AU - Eguchi, Naoya

AU - Nakanishi, Yosuke

PY - 1996

Y1 - 1996

N2 - A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.

AB - A large capacity inverter for power system apparatus is developed for simultaneously implementing inverter loss reduction, harmonic reduction, and system disturbance control. The inverter consists of a hybrid inverter of a GTO inverter and an insulated gate bipolar transistor inverter. The main circuit configuration of the hybrid inverter is presented and the inverter control system is outlined. The capabilities of the inverter are demonstrated by computer simulation and the harmonic characteristics in steady state and transient characteristics of system voltage dip are analyzed.

UR - http://www.scopus.com/inward/record.url?scp=0030389472&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030389472&partnerID=8YFLogxK

M3 - Other chapter contribution

AN - SCOPUS:0030389472

VL - 4

SP - 4472

EP - 4473

BT - Proceedings of the IEEE Conference on Decision and Control

A2 - Anon, null

ER -