High throughput VLSI architecture of a fast mode decision algorithm for H.264/AVC intra prediction

Tianruo Zhang, Shen Li, Guifen Tian, Takeshi Ikenaga, Satoshi Goto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Intra coding in H.264/AVC has significantly enhanced the video compression efficiency. However, computation complexity increases due to the rate-distortion (RD) based mode decision. This paper proposes a new fast mode decision algorithm in H.264/AVC intra prediction and its VLSI architecture. A new edge-detection pattern is proposed and both edge-detection technique and spatial mode prediction technique are combined together to reduce intra 4x4 candidate mode number from 9 to an average of 2.42. This algorithm is the only hardware-oriented algorithm which can reduce the number of 4x4 candidate mode to less than 4. VLSI architecture of intra mode decision module is designed with TSMC 0.18μm CMOS technology. The maximum frequency of 285MHz is achieved and 13.1k gates are required. High frequency, efficient processing cycle reduction and small area make this design to be an excellent accelerator for HDTV 1080p@30fps real time encoder.

Original languageEnglish
Title of host publication2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008
Pages1245-1249
Number of pages5
DOIs
Publication statusPublished - 2008 Dec 1
Event2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008 - Xiamen, Fujian Province, China
Duration: 2008 May 252008 May 27

Publication series

Name2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008

Conference

Conference2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008
CountryChina
CityXiamen, Fujian Province
Period08/5/2508/5/27

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Zhang, T., Li, S., Tian, G., Ikenaga, T., & Goto, S. (2008). High throughput VLSI architecture of a fast mode decision algorithm for H.264/AVC intra prediction. In 2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008 (pp. 1245-1249). [4657993] (2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008). https://doi.org/10.1109/ICCCAS.2008.4657993