High throughput VLSI architecture of a fast mode decision algorithm for H.264/AVC intra encoding

Tianruo Zhang, Guifen Tian, Takeshi Ikenaga, Satoshi Goto

Research output: Contribution to journalArticle

Abstract

Intra coding in H.264/AVC has significantly enhanced video compression efficiency. However, computation complexity increases by the rate-distortion (RD) based mode decision. This paper proposes a novel fast mode decision algorithm in H.264/AVC intra prediction and its VLSI architecture. A novel edge-detection pattern is proposed and both edge-detection technique and spatial mode prediction technique are combined together to reduce the number of intra 4 × 4 candidate modes from 9 to an average of 2.50. VLSI architecture of intra mode decision module is designed with TSMC 0.18μm CMOS technology. The maximum frequency of 285 MHz is achieved and 13. 1k NAND gates are required. High frequency, efficient processing cycle reduction and small area make this design to be an excellent accelerator for HDTV 1080p@30fps real time encoder.

Original languageEnglish
Pages (from-to)3630-3637
Number of pages8
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE91-A
Issue number12
DOIs
Publication statusPublished - 2008

Fingerprint

VLSI Architecture
Mode Decision
Edge detection
High Throughput
Encoding
Throughput
Edge Detection
High definition television
Image compression
Intra Prediction
Particle accelerators
NAND
Video Compression
Rate-distortion
Encoder
Accelerator
Processing
Coding
Cycle
Module

Keywords

  • Fast mode decision algorithm
  • H.264/AVC
  • Intra prediction
  • VLSI architecture

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Applied Mathematics
  • Signal Processing

Cite this

High throughput VLSI architecture of a fast mode decision algorithm for H.264/AVC intra encoding. / Zhang, Tianruo; Tian, Guifen; Ikenaga, Takeshi; Goto, Satoshi.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 12, 2008, p. 3630-3637.

Research output: Contribution to journalArticle

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