In-situ Trojan authentication for invalidating hardware-Trojan functions

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)


Due to the fact that we do not know who will create hardware Trojans (HTs), and when and where they would be inserted, it is very difficult to correctly and completely detect all the real HTs in untrusted ICs, and thus it is desired to incorporate in-situ HT invalidating functions into untrusted ICs as a countermeasure against HTs. This paper proposes an in-situ Trojan authentication technique for gate-level netlists to avoid security leakage. In the proposed approach, an untrusted IC operates in authentication mode and normal mode. In the authentication mode, an embedded Trojan authentication circuit monitors the bit-flipping count of a suspicious Trojan net within the pre-defined constant clock cycles and identify whether it is a real Trojan or not. If the authentication condition is satisfied, the suspicious Trojan net is validated. Otherwise, it is invalidated and HT functions are masked. By doing this, even untrusted netlists with HTs can still be used in the normal mode without security leakage. By setting the appropriate authentication condition using training sets from Trust-HUB gate-level benchmarks, the proposed technique invalidates successfully only HTs in the training sets. Furthermore, by embedding the in-situ Trojan authentication circuit into a Trojan-inserted AES crypto netlist, it can run securely and correctly even if HTs exist where its area overhead is just 1.5% with no delay overhead.

Original languageEnglish
Title of host publicationProceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016
PublisherIEEE Computer Society
Number of pages6
ISBN (Electronic)9781509012138
Publication statusPublished - 2016 May 25
Event17th International Symposium on Quality Electronic Design, ISQED 2016 - Santa Clara, United States
Duration: 2016 Mar 152016 Mar 16

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295


Other17th International Symposium on Quality Electronic Design, ISQED 2016
Country/TerritoryUnited States
CitySanta Clara


  • HT invalidation circuit
  • Trojan authentication
  • bit-flipping counts
  • gate-level netlist
  • hardware Trojans

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality


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