Increase of crosstalk noise due to imbalanced threshold voltage between NMOS and PMOS in sub-threshold logic circuits

Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Abnormal increase of the crosstalk noise in the sub-threshold logic circuits is found for the first time. When the threshold voltages (V TH) of nMOS and pMOS are imbalanced and the on-resistance of the aggressor driver is much lower than that of the victim driver, the large crosstalk noise is observed, because the on-resistance has an exponential dependence on VTH in the sub-threshold circuits. In this paper, the large crosstalk noise due to the imbalanced VTH is measured. A new crosstalk noise model is also proposed and verified with SPICE simulations. In a crosstalk noise test chip with 1.5-mm wire in a 40-nm CMOS at the power supply voltage (VDD) of 0.3V, the measured noise amplitude increases from 32% of VDD to 71% of VDD, when the imbalanced V TH is realized by tuning a body bias in pMOS. In the worst case fast-nMOS/slow-pMOS corner simulations, the noise amplitude increases from 47% of VDD to 68% of VDD, when VDD is reduced from 1.1V to 0.3V, which is explained by the proposed model.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012
DOIs
Publication statusPublished - 2012 Nov 26
Externally publishedYes
Event34th Annual Custom Integrated Circuits Conference, CICC 2012 - San Jose, CA, United States
Duration: 2012 Sep 92012 Sep 12

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Other

Other34th Annual Custom Integrated Circuits Conference, CICC 2012
CountryUnited States
CitySan Jose, CA
Period12/9/912/9/12

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Fuketa, H., Takahashi, R., Takamiya, M., Nomura, M., Shinohara, H., & Sakurai, T. (2012). Increase of crosstalk noise due to imbalanced threshold voltage between NMOS and PMOS in sub-threshold logic circuits. In Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012 [6330689] (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2012.6330689