Abstract
A 144-kb/s digital subscriber loop (DSL) transmission system has been developed using two CMOS LSIs, a programmable multiplexing processor, and an echo canceler. The system uses AMI (automatic mark inversion) line code and a unique frame format for stable timing extraction. Experiments have shown that the system is capable of error-free bidirectional transmission over more than 6 km on a 0. 5-mm-diameter cable at 160 kb/s. The features of the multiplexer-processor and the echo-canceller LSIs, the DSL functions, and some performance characteristics of the system are discussed.
Original language | English |
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Title of host publication | Unknown Host Publication Title |
Place of Publication | Tokyo, Jpn |
Publisher | Ohmsha Ltd |
Pages | 1741-1745 |
Number of pages | 5 |
ISBN (Print) | 4274031888 |
Publication status | Published - 1987 |
ASJC Scopus subject areas
- Engineering(all)