LAMBDA: AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs.

Kazuhiko Takamizawa, Tsuneo Matsuda, Tomoyuki Fujita, Hisashi Mizumura, Hiroshi Nakamura, Fumihide Kitajima, Masahiro Murakoshi, Satoshi Goto

    Research output: Contribution to journalArticle

    Abstract

    An automatic/interactive layout Computer Aided Design (CAD) system for designing master-slice LSI chips, is presented which places function blocks and gives wiring patterns on the chip. Since 100% routing is essential for master-slice layout design, it is urgently required to establish a strong CAD system that significantly reduces the design time. The LAMBDA system has been developed to achieve complete net connectivity in as short a design time as possible, where efficient automatic procedures are implemented as well as highly interactive functions. The system adopts two-level hierarchical algorithms for placement and routing problems. Furthermore, highly interactive functions are realized by exploiting human intelligence and the computer's high speed processing.

    Original languageEnglish
    Pages (from-to)32-42
    Number of pages11
    JournalNEC Research and Development
    Issue number73
    Publication statusPublished - 1984 Apr

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    Computer aided design
    Electric wiring
    Processing

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Takamizawa, K., Matsuda, T., Fujita, T., Mizumura, H., Nakamura, H., Kitajima, F., ... Goto, S. (1984). LAMBDA: AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs. NEC Research and Development, (73), 32-42.

    LAMBDA : AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs. / Takamizawa, Kazuhiko; Matsuda, Tsuneo; Fujita, Tomoyuki; Mizumura, Hisashi; Nakamura, Hiroshi; Kitajima, Fumihide; Murakoshi, Masahiro; Goto, Satoshi.

    In: NEC Research and Development, No. 73, 04.1984, p. 32-42.

    Research output: Contribution to journalArticle

    Takamizawa, K, Matsuda, T, Fujita, T, Mizumura, H, Nakamura, H, Kitajima, F, Murakoshi, M & Goto, S 1984, 'LAMBDA: AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs.', NEC Research and Development, no. 73, pp. 32-42.
    Takamizawa K, Matsuda T, Fujita T, Mizumura H, Nakamura H, Kitajima F et al. LAMBDA: AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs. NEC Research and Development. 1984 Apr;(73):32-42.
    Takamizawa, Kazuhiko ; Matsuda, Tsuneo ; Fujita, Tomoyuki ; Mizumura, Hisashi ; Nakamura, Hiroshi ; Kitajima, Fumihide ; Murakoshi, Masahiro ; Goto, Satoshi. / LAMBDA : AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs. In: NEC Research and Development. 1984 ; No. 73. pp. 32-42.
    @article{82821412037d45f3adbd1e632581539d,
    title = "LAMBDA: AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs.",
    abstract = "An automatic/interactive layout Computer Aided Design (CAD) system for designing master-slice LSI chips, is presented which places function blocks and gives wiring patterns on the chip. Since 100{\%} routing is essential for master-slice layout design, it is urgently required to establish a strong CAD system that significantly reduces the design time. The LAMBDA system has been developed to achieve complete net connectivity in as short a design time as possible, where efficient automatic procedures are implemented as well as highly interactive functions. The system adopts two-level hierarchical algorithms for placement and routing problems. Furthermore, highly interactive functions are realized by exploiting human intelligence and the computer's high speed processing.",
    author = "Kazuhiko Takamizawa and Tsuneo Matsuda and Tomoyuki Fujita and Hisashi Mizumura and Hiroshi Nakamura and Fumihide Kitajima and Masahiro Murakoshi and Satoshi Goto",
    year = "1984",
    month = "4",
    language = "English",
    pages = "32--42",
    journal = "NEC Research and Development",
    issn = "0048-0436",
    publisher = "NEC Media Products Ltd.",
    number = "73",

    }

    TY - JOUR

    T1 - LAMBDA

    T2 - AN AUTOMATIC/INTERACTIVE CAD SYSTEM FOR MASTER-SLICE LSIs.

    AU - Takamizawa, Kazuhiko

    AU - Matsuda, Tsuneo

    AU - Fujita, Tomoyuki

    AU - Mizumura, Hisashi

    AU - Nakamura, Hiroshi

    AU - Kitajima, Fumihide

    AU - Murakoshi, Masahiro

    AU - Goto, Satoshi

    PY - 1984/4

    Y1 - 1984/4

    N2 - An automatic/interactive layout Computer Aided Design (CAD) system for designing master-slice LSI chips, is presented which places function blocks and gives wiring patterns on the chip. Since 100% routing is essential for master-slice layout design, it is urgently required to establish a strong CAD system that significantly reduces the design time. The LAMBDA system has been developed to achieve complete net connectivity in as short a design time as possible, where efficient automatic procedures are implemented as well as highly interactive functions. The system adopts two-level hierarchical algorithms for placement and routing problems. Furthermore, highly interactive functions are realized by exploiting human intelligence and the computer's high speed processing.

    AB - An automatic/interactive layout Computer Aided Design (CAD) system for designing master-slice LSI chips, is presented which places function blocks and gives wiring patterns on the chip. Since 100% routing is essential for master-slice layout design, it is urgently required to establish a strong CAD system that significantly reduces the design time. The LAMBDA system has been developed to achieve complete net connectivity in as short a design time as possible, where efficient automatic procedures are implemented as well as highly interactive functions. The system adopts two-level hierarchical algorithms for placement and routing problems. Furthermore, highly interactive functions are realized by exploiting human intelligence and the computer's high speed processing.

    UR - http://www.scopus.com/inward/record.url?scp=0021409959&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=0021409959&partnerID=8YFLogxK

    M3 - Article

    AN - SCOPUS:0021409959

    SP - 32

    EP - 42

    JO - NEC Research and Development

    JF - NEC Research and Development

    SN - 0048-0436

    IS - 73

    ER -