Abstract
This paper presents a novel implication-based method for logic minimization in large-scale multi-level networks. It significantly reduces network size through repeated addition and removal of redundant subnetworks utilizing multisignal implications and relationships among these implications. These are handled on a transitive implication graph proposed in this paper which offers the practical use of implications for logic minimization. The proposed method holds great promise for the achievement of an interactive logic design environment for large-scale networks.
Original language | English |
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Pages (from-to) | 2390-2397 |
Number of pages | 8 |
Journal | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
Volume | E82-A |
Issue number | 11 |
Publication status | Published - 1999 |
Externally published | Yes |
Keywords
- Implication
- Implication graph
- Logic minimization
- Logic synthesis
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Hardware and Architecture
- Information Systems