Low power parallel surveillance video encoding system based on joint power-speed scheduling

Xin Jin*, Satoshi Goto

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a low power parallel surveillance video encoding system based on joint power-speed scheduling is proposed. The relative relationships among the CPU statuses, total power consumption and encoding speed are analyzed and modeled for multi-core processors. Based on the power directional graph and the relative encoding speed model, the working statuses of the cores are controlled jointly adapting to video encoding workload to minimize the total power consumption. It provides more than 20% power reduction compared with the latest existing system without a penalty on the encoding speed.

Original languageEnglish
Title of host publication2011 IEEE Visual Communications and Image Processing, VCIP 2011
DOIs
Publication statusPublished - 2011
Event2011 IEEE Visual Communications and Image Processing, VCIP 2011 - Tainan
Duration: 2011 Nov 62011 Nov 9

Other

Other2011 IEEE Visual Communications and Image Processing, VCIP 2011
CityTainan
Period11/11/611/11/9

Keywords

  • DVFS
  • H.264/AVC
  • Joint power-speed scheduling
  • multicore platform
  • parallel encoding
  • video encoding

ASJC Scopus subject areas

  • Computer Vision and Pattern Recognition

Fingerprint

Dive into the research topics of 'Low power parallel surveillance video encoding system based on joint power-speed scheduling'. Together they form a unique fingerprint.

Cite this