Abstract
A 0.25 μm W-polycide dual gate CMOS has been newly developed for a logic in DRAM under low voltage operation. A novel gate electrode can eliminate inter-diffusion and the gate depletion using a barrier oxide film against dopant diffusion, so that a dual gate CMOS can be fabricated with sufficient thermal budget. Moreover, low threshold voltage and high current drivability can be obtained by non-uniformly doped channel structure formed by the oblique rotational ion implantation utilizing W-polycide gate as a mask. As a result, a high performance has been achieved.
| Original language | English |
|---|---|
| Pages (from-to) | 583-586 |
| Number of pages | 4 |
| Journal | Unknown Journal |
| Publication status | Published - 1996 |
| Externally published | Yes |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Low voltage operation of sub-quarter micron W-polycide dual gate CMOS with non-uniformly doped channel. / Sayama, H.; Kuroi, T.; Shimizu, S.; Shirahata, M.; Okumura, Y.; Inuishi, Masahide; Miyoshi, H.
In: Unknown Journal, 1996, p. 583-586.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Low voltage operation of sub-quarter micron W-polycide dual gate CMOS with non-uniformly doped channel
AU - Sayama, H.
AU - Kuroi, T.
AU - Shimizu, S.
AU - Shirahata, M.
AU - Okumura, Y.
AU - Inuishi, Masahide
AU - Miyoshi, H.
PY - 1996
Y1 - 1996
N2 - A 0.25 μm W-polycide dual gate CMOS has been newly developed for a logic in DRAM under low voltage operation. A novel gate electrode can eliminate inter-diffusion and the gate depletion using a barrier oxide film against dopant diffusion, so that a dual gate CMOS can be fabricated with sufficient thermal budget. Moreover, low threshold voltage and high current drivability can be obtained by non-uniformly doped channel structure formed by the oblique rotational ion implantation utilizing W-polycide gate as a mask. As a result, a high performance has been achieved.
AB - A 0.25 μm W-polycide dual gate CMOS has been newly developed for a logic in DRAM under low voltage operation. A novel gate electrode can eliminate inter-diffusion and the gate depletion using a barrier oxide film against dopant diffusion, so that a dual gate CMOS can be fabricated with sufficient thermal budget. Moreover, low threshold voltage and high current drivability can be obtained by non-uniformly doped channel structure formed by the oblique rotational ion implantation utilizing W-polycide gate as a mask. As a result, a high performance has been achieved.
UR - http://www.scopus.com/inward/record.url?scp=0030398598&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0030398598&partnerID=8YFLogxK
M3 - Article
SP - 583
EP - 586
JO - Nuclear Physics A
JF - Nuclear Physics A
SN - 0375-9474
ER -