LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM.

Kazuo Murano, Shigeyuki Unagami Shigeyuki, Toshitaka Tsuda

    Research output: Contribution to journalArticle

    4 Citations (Scopus)

    Abstract

    This paper describes a fast data processing LSI unit suitable for digital signal processing (DSP) applications in the field of electrical communications. The SLI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one operation and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware. The automatic equalizer for 4800 bit/s modem was implemented using two of the developed LSI processors and about 4 K ROM and 1 K RAM memory chips. The measurement on this modem gave the error rate of 10** minus **5 at S/N equals 1. 76 dB and error free phase jitter allowance of 55 degree p-p. Application of the LSI processor to digital filters for roll-off spectrum shaping and timing signal extraction is also described.

    Original languageEnglish
    Pages (from-to)499-506
    Number of pages8
    JournalIEEE Transactions on Communications
    VolumeCOM-26
    Issue number5
    Publication statusPublished - 1978 May

    Fingerprint

    Modems
    Digital signal processing
    Firmware
    ROM
    Data handling
    Random access storage
    Equalizers
    Digital filters
    Jitter
    Pipelines
    Data storage equipment
    Communication
    Processing

    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Electrical and Electronic Engineering

    Cite this

    LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM. / Murano, Kazuo; Unagami Shigeyuki, Shigeyuki; Tsuda, Toshitaka.

    In: IEEE Transactions on Communications, Vol. COM-26, No. 5, 05.1978, p. 499-506.

    Research output: Contribution to journalArticle

    Murano, K, Unagami Shigeyuki, S & Tsuda, T 1978, 'LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM.', IEEE Transactions on Communications, vol. COM-26, no. 5, pp. 499-506.
    Murano, Kazuo ; Unagami Shigeyuki, Shigeyuki ; Tsuda, Toshitaka. / LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM. In: IEEE Transactions on Communications. 1978 ; Vol. COM-26, No. 5. pp. 499-506.
    @article{ab1e1bb0495c42be80ae81d7816b432a,
    title = "LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM.",
    abstract = "This paper describes a fast data processing LSI unit suitable for digital signal processing (DSP) applications in the field of electrical communications. The SLI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one operation and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware. The automatic equalizer for 4800 bit/s modem was implemented using two of the developed LSI processors and about 4 K ROM and 1 K RAM memory chips. The measurement on this modem gave the error rate of 10** minus **5 at S/N equals 1. 76 dB and error free phase jitter allowance of 55 degree p-p. Application of the LSI processor to digital filters for roll-off spectrum shaping and timing signal extraction is also described.",
    author = "Kazuo Murano and {Unagami Shigeyuki}, Shigeyuki and Toshitaka Tsuda",
    year = "1978",
    month = "5",
    language = "English",
    volume = "COM-26",
    pages = "499--506",
    journal = "IEEE Transactions on Communications",
    issn = "0096-1965",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    number = "5",

    }

    TY - JOUR

    T1 - LSI PROCESSOR FOR DIGITAL SIGNAL PROCESSING AND ITS APPLICATION TO 4800 BIT/S MODEM.

    AU - Murano, Kazuo

    AU - Unagami Shigeyuki, Shigeyuki

    AU - Tsuda, Toshitaka

    PY - 1978/5

    Y1 - 1978/5

    N2 - This paper describes a fast data processing LSI unit suitable for digital signal processing (DSP) applications in the field of electrical communications. The SLI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one operation and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware. The automatic equalizer for 4800 bit/s modem was implemented using two of the developed LSI processors and about 4 K ROM and 1 K RAM memory chips. The measurement on this modem gave the error rate of 10** minus **5 at S/N equals 1. 76 dB and error free phase jitter allowance of 55 degree p-p. Application of the LSI processor to digital filters for roll-off spectrum shaping and timing signal extraction is also described.

    AB - This paper describes a fast data processing LSI unit suitable for digital signal processing (DSP) applications in the field of electrical communications. The SLI processor discussed adopts a firmware control scheme to enhance the flexibility and freedom of application and extensively utilizes the pipeline processing technique to attain high speed data handling capability. The various operations encountered in DSP systems are unified into one operation and the LSI processor is designed to continuously perform this operation, while the data to be operated are transferred sequentially into the processor controlled by exterior firmware. The automatic equalizer for 4800 bit/s modem was implemented using two of the developed LSI processors and about 4 K ROM and 1 K RAM memory chips. The measurement on this modem gave the error rate of 10** minus **5 at S/N equals 1. 76 dB and error free phase jitter allowance of 55 degree p-p. Application of the LSI processor to digital filters for roll-off spectrum shaping and timing signal extraction is also described.

    UR - http://www.scopus.com/inward/record.url?scp=0017971167&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=0017971167&partnerID=8YFLogxK

    M3 - Article

    VL - COM-26

    SP - 499

    EP - 506

    JO - IEEE Transactions on Communications

    JF - IEEE Transactions on Communications

    SN - 0096-1965

    IS - 5

    ER -