Macroblock feature based adaptive propagate partial SAD architecture for HDTV application

Yiqing Huang, Qin Liu, Takeshi Ikenaga

Research output: Contribution to journalArticle

Abstract

A macroblock (MB) feature based adaptive propagate partial SAD architecture is proposed in this paper. Firstly, by using edge detection operator, the homogeneous MB is detected before motion estimation and three hardware friendly subsampling patterns are adaptively selected for MB with different homogeneity. The proposed architecture uses four different processing elements to realize adaptive subsampling scheme. Secondly, in order to achieve data reuse and power reduction in memory part, the reference pixels in search window are reorganization into two memory groups, which output pixel data interactively for adaptive subsampling. Moreover, a compressor tree based circuit level optimization is included in our design to reduce hardware cost. Synthesized with TSMC 0.18 um technology, averagely 10 k gates hardware can be reduced for the whole IME engine based on our optimization. With 481 k gates at 110.5 MHz, an 720-p, 30-fps HDTV integer motion estimation engine is designed. Compared with previous work, our design can achieve 39.8% reduction in power consumption with only 3.44% increase in hardware.

Original languageEnglish
Pages (from-to)263-273
Number of pages11
JournalIPSJ Transactions on System LSI Design Methodology
Volume2
DOIs
Publication statusPublished - 2009

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High definition television
Hardware
Motion estimation
Pixels
Engines
Data storage equipment
Edge detection
Compressors
Electric power utilization
Networks (circuits)
Processing
Costs

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications

Cite this

Macroblock feature based adaptive propagate partial SAD architecture for HDTV application. / Huang, Yiqing; Liu, Qin; Ikenaga, Takeshi.

In: IPSJ Transactions on System LSI Design Methodology, Vol. 2, 2009, p. 263-273.

Research output: Contribution to journalArticle

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