Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier

Masafumi Suizu, Kosuke Katayama, Mizuki Motoyoshi, Kyoya Takano, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper we propose a method of maximizing the efficiency, defined as transducer gain G T per power dissipation P DC, of a CMOS 100 GHz six-stage amplifier using bias point tuning. Using this method, the optimal bias voltage was 0.75V and the efficiency was 30dB/W higher than that for a voltage of 0.9V.

Original languageEnglish
Title of host publicationIMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai
Pages160-161
Number of pages2
DOIs
Publication statusPublished - 2012 Jul 30
Externally publishedYes
Event10th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2012 - Osaka, Japan
Duration: 2012 May 92012 May 11

Publication series

NameIMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai

Other

Other10th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2012
CountryJapan
CityOsaka
Period12/5/912/5/11

Keywords

  • Millimeter wave
  • Power amplifier
  • Power dissipation
  • Transceiver
  • Transducer gain

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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