Abstract
Mismatch factor of SRAM bit cell and noise factor that affects its power up state are measured using 256 bit SRAM PUF test structure with bias voltage inputs. Probability of power up state is used to extract a mismatch factor normalized by σn (sigma noise voltage). By combining shifted bias voltages and repeat evaluation, whole 256 bit mismatch factors from real SRAM with small modification are obtained. According to the measurement data, it is confirmed that both noise factor and mismatch factor follow Gaussian distribution within a range of ±3.5σ and ± 2.9σ, respectively.
| Original language | English |
|---|---|
| Title of host publication | 2017 International Conference of Microelectronic Test Structures, ICMTS 2017 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781509036158 |
| DOIs | |
| Publication status | Published - 2017 Jun 20 |
| Event | 2017 International Conference of Microelectronic Test Structures, ICMTS 2017 - Grenoble, France Duration: 2017 Mar 27 → 2017 Mar 30 |
Other
| Other | 2017 International Conference of Microelectronic Test Structures, ICMTS 2017 |
|---|---|
| Country | France |
| City | Grenoble |
| Period | 17/3/27 → 17/3/30 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Measurement of mismatch factor and noise of SRAM PUF using small bias voltage. / Cui, Ziyang; Zheng, Baikun; Piao, Yanhao; Liu, Shiyu; Xie, Ronghao; Shinohara, Hirofumi.
2017 International Conference of Microelectronic Test Structures, ICMTS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7954264.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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TY - GEN
T1 - Measurement of mismatch factor and noise of SRAM PUF using small bias voltage
AU - Cui, Ziyang
AU - Zheng, Baikun
AU - Piao, Yanhao
AU - Liu, Shiyu
AU - Xie, Ronghao
AU - Shinohara, Hirofumi
PY - 2017/6/20
Y1 - 2017/6/20
N2 - Mismatch factor of SRAM bit cell and noise factor that affects its power up state are measured using 256 bit SRAM PUF test structure with bias voltage inputs. Probability of power up state is used to extract a mismatch factor normalized by σn (sigma noise voltage). By combining shifted bias voltages and repeat evaluation, whole 256 bit mismatch factors from real SRAM with small modification are obtained. According to the measurement data, it is confirmed that both noise factor and mismatch factor follow Gaussian distribution within a range of ±3.5σ and ± 2.9σ, respectively.
AB - Mismatch factor of SRAM bit cell and noise factor that affects its power up state are measured using 256 bit SRAM PUF test structure with bias voltage inputs. Probability of power up state is used to extract a mismatch factor normalized by σn (sigma noise voltage). By combining shifted bias voltages and repeat evaluation, whole 256 bit mismatch factors from real SRAM with small modification are obtained. According to the measurement data, it is confirmed that both noise factor and mismatch factor follow Gaussian distribution within a range of ±3.5σ and ± 2.9σ, respectively.
UR - http://www.scopus.com/inward/record.url?scp=85023173053&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85023173053&partnerID=8YFLogxK
U2 - 10.1109/ICMTS.2017.7954264
DO - 10.1109/ICMTS.2017.7954264
M3 - Conference contribution
AN - SCOPUS:85023173053
BT - 2017 International Conference of Microelectronic Test Structures, ICMTS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
ER -