Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure

Kiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto, Hirofumi Shinohara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and memory effect. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.

Original languageEnglish
Title of host publication2016 29th IEEE International Conference on Microelectronic Test Structures, ICMTS 2016 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages130-134
Number of pages5
ISBN (Electronic)9781467387934
DOIs
Publication statusPublished - 2016 May 20
Event29th IEEE International Conference on Microelectronic Test Structures, ICMTS 2016 - Yokohama, Japan
Duration: 2016 Mar 282016 Mar 31

Publication series

NameIEEE International Conference on Microelectronic Test Structures
Volume2016-May

Other

Other29th IEEE International Conference on Microelectronic Test Structures, ICMTS 2016
Country/TerritoryJapan
CityYokohama
Period16/3/2816/3/31

Keywords

  • SRAM
  • physical unclonable function
  • test structure

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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