MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM.

Mikio Asakura, Yoshio Matsuda, Katsuhiro Tsukamoto, Kazuyasu Fujishima, Tsutomu Yoshihara

Research output: Chapter in Book/Report/Conference proceedingChapter

2 Citations (Scopus)

Abstract

This letter reports a charge collection experiment of alpha-particle-induced carriers in the cell arrays of the 1 Mb DRAM. It is indicated that this experiment is effective to estimate the soft error rate of VLSI memories with various kinds of structures.

Original languageEnglish
Title of host publicationTransactions of the Institute of Electronics, Information and Communication Engineers, Section E (
Pages1060-1061
Number of pages2
VolumeE70
Edition11
Publication statusPublished - 1987 Nov
Externally publishedYes
EventPap from the 1987 Natl Conf on Semicond Devices and Mater IEICE - Kumamoto, Jpn
Duration: 1987 Nov 11987 Nov 4

Other

OtherPap from the 1987 Natl Conf on Semicond Devices and Mater IEICE
CityKumamoto, Jpn
Period87/11/187/11/4

Fingerprint

Dynamic random access storage
Alpha particles
Experiments
Data storage equipment

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Asakura, M., Matsuda, Y., Tsukamoto, K., Fujishima, K., & Yoshihara, T. (1987). MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM. In Transactions of the Institute of Electronics, Information and Communication Engineers, Section E ( (11 ed., Vol. E70, pp. 1060-1061)

MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM. / Asakura, Mikio; Matsuda, Yoshio; Tsukamoto, Katsuhiro; Fujishima, Kazuyasu; Yoshihara, Tsutomu.

Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (. Vol. E70 11. ed. 1987. p. 1060-1061.

Research output: Chapter in Book/Report/Conference proceedingChapter

Asakura, M, Matsuda, Y, Tsukamoto, K, Fujishima, K & Yoshihara, T 1987, MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM. in Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (. 11 edn, vol. E70, pp. 1060-1061, Pap from the 1987 Natl Conf on Semicond Devices and Mater IEICE, Kumamoto, Jpn, 87/11/1.
Asakura M, Matsuda Y, Tsukamoto K, Fujishima K, Yoshihara T. MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM. In Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (. 11 ed. Vol. E70. 1987. p. 1060-1061
Asakura, Mikio ; Matsuda, Yoshio ; Tsukamoto, Katsuhiro ; Fujishima, Kazuyasu ; Yoshihara, Tsutomu. / MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM. Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (. Vol. E70 11. ed. 1987. pp. 1060-1061
@inbook{8a8b0c3f70c74aa4bfed151ebb768c81,
title = "MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM.",
abstract = "This letter reports a charge collection experiment of alpha-particle-induced carriers in the cell arrays of the 1 Mb DRAM. It is indicated that this experiment is effective to estimate the soft error rate of VLSI memories with various kinds of structures.",
author = "Mikio Asakura and Yoshio Matsuda and Katsuhiro Tsukamoto and Kazuyasu Fujishima and Tsutomu Yoshihara",
year = "1987",
month = "11",
language = "English",
volume = "E70",
pages = "1060--1061",
booktitle = "Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (",
edition = "11",

}

TY - CHAP

T1 - MECHANISM OF BIT LINE MODE SOFT ERROR FOR DRAM.

AU - Asakura, Mikio

AU - Matsuda, Yoshio

AU - Tsukamoto, Katsuhiro

AU - Fujishima, Kazuyasu

AU - Yoshihara, Tsutomu

PY - 1987/11

Y1 - 1987/11

N2 - This letter reports a charge collection experiment of alpha-particle-induced carriers in the cell arrays of the 1 Mb DRAM. It is indicated that this experiment is effective to estimate the soft error rate of VLSI memories with various kinds of structures.

AB - This letter reports a charge collection experiment of alpha-particle-induced carriers in the cell arrays of the 1 Mb DRAM. It is indicated that this experiment is effective to estimate the soft error rate of VLSI memories with various kinds of structures.

UR - http://www.scopus.com/inward/record.url?scp=0023456714&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0023456714&partnerID=8YFLogxK

M3 - Chapter

AN - SCOPUS:0023456714

VL - E70

SP - 1060

EP - 1061

BT - Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (

ER -