Merged logic and DRAM

M. Inuishi; B. Havemann; M. Yamawaki; S. Stiffler; C. Kim; N. Lu; D. Scott; O. Tomisawa; H. Ishiuchi; C. S. Choi; H. Kalter; F. Pollack; D. Puar

Merged logic and DRAM

M. Inuishi, B. Havemann, M. Yamawaki, S. Stiffler, C. Kim, N. Lu, D. Scott, O. Tomisawa, H. Ishiuchi, C. S. Choi, H. Kalter, F. Pollack, D. Puar

Research output: Contribution to journal › Conference article › peer-review

Abstract

With the evolution highly specialized technologies that are designed for either memory or logic, the survival of a merged technology is not guaranteed. Merged logic and DRAM poses some serious challenges to circuit designers. A merged technology will have to sacrifice either some of its memory functions or some of its logic process or both to achieve a balance and create a workable system.

Original language	English
Number of pages	1
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 1997
Externally published	Yes
Event	Proceedings of the 1997 Symposium on VLSI Technology - Kyoto, Jpn Duration: 1997 Jun 10 → 1997 Jun 12

ASJC Scopus subject areas

Electrical and Electronic Engineering

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title = "Merged logic and DRAM",

abstract = "With the evolution highly specialized technologies that are designed for either memory or logic, the survival of a merged technology is not guaranteed. Merged logic and DRAM poses some serious challenges to circuit designers. A merged technology will have to sacrifice either some of its memory functions or some of its logic process or both to achieve a balance and create a workable system.",

author = "M. Inuishi and B. Havemann and M. Yamawaki and S. Stiffler and C. Kim and N. Lu and D. Scott and O. Tomisawa and H. Ishiuchi and Choi, {C. S.} and H. Kalter and F. Pollack and D. Puar",

year = "1997",

language = "English",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1997 Symposium on VLSI Technology ; Conference date: 10-06-1997 Through 12-06-1997",

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T1 - Merged logic and DRAM

AU - Inuishi, M.

AU - Havemann, B.

AU - Yamawaki, M.

AU - Stiffler, S.

AU - Kim, C.

AU - Lu, N.

AU - Scott, D.

AU - Tomisawa, O.

AU - Ishiuchi, H.

AU - Choi, C. S.

AU - Kalter, H.

AU - Pollack, F.

AU - Puar, D.

PY - 1997

Y1 - 1997

N2 - With the evolution highly specialized technologies that are designed for either memory or logic, the survival of a merged technology is not guaranteed. Merged logic and DRAM poses some serious challenges to circuit designers. A merged technology will have to sacrifice either some of its memory functions or some of its logic process or both to achieve a balance and create a workable system.

AB - With the evolution highly specialized technologies that are designed for either memory or logic, the survival of a merged technology is not guaranteed. Merged logic and DRAM poses some serious challenges to circuit designers. A merged technology will have to sacrifice either some of its memory functions or some of its logic process or both to achieve a balance and create a workable system.

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M3 - Conference article

AN - SCOPUS:0030719601

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

SN - 0743-1562

T2 - Proceedings of the 1997 Symposium on VLSI Technology

Y2 - 10 June 1997 through 12 June 1997

ER -

Merged logic and DRAM

Abstract

ASJC Scopus subject areas

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