Minimization of vote operations for soft error detection in DMR design with error correction by operation re-execution

Kazuhito Ito, Yuto Ishihara, Shinichi Nishizawa

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

As LSI chips integrate more transistors and the operating power supply voltage decreases, LSI chips are becoming more vulnerable to the soft error caused by neutrons induced from cosmic rays. The soft error is detected by comparing the duplicated operation results in double modular redundancy (DMR) and the error is corrected by re-executing necessary operations. In this paper, based on the error recovery scheme of re-executing necessary operations, the minimization of the vote operations for error checking with respect to given resource constraints is considered. An ILP model for the optimal solution to the problem is presented and a heuristic algorithm is proposed to minimize the vote operations.

Original languageEnglish
Pages (from-to)2271-2279
Number of pages9
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE101A
Issue number12
DOIs
Publication statusPublished - 2018 Dec
Externally publishedYes

Keywords

  • Checkpoint
  • DMR
  • Error detection
  • Scheduling
  • Soft error

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

Fingerprint

Dive into the research topics of 'Minimization of vote operations for soft error detection in DMR design with error correction by operation re-execution'. Together they form a unique fingerprint.

Cite this