Multi-stage power gating based on controlling values of logic gates

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the CMOS technology scales down, low power technologies have been expected to reduce leakage power of the CMOS device. Controlling value based power gating is a fine-grained active mode power gating approach using the controlling values of logic elements. In this method, one input of a logic gate taking the controlling value stops the power supply to the logic blocks generating other inputs. In this paper, we propose a multi-stage power gating method based on controlling values by stopping the power supply of several gates in the power controlled blocks. Experimental results show that the proposed approach increases the number of power-off elements by 26.7% in average compared with the single-stage power-gating method.

Original languageEnglish
Title of host publicationProceedings - 2011 IEEE 9th International Conference on ASIC, ASICON 2011
Pages79-82
Number of pages4
DOIs
Publication statusPublished - 2011 Dec 1
Event2011 IEEE 9th International Conference on ASIC, ASICON 2011 - Xiamen, China
Duration: 2011 Oct 252011 Oct 28

Publication series

NameProceedings of International Conference on ASIC
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X

Conference

Conference2011 IEEE 9th International Conference on ASIC, ASICON 2011
CountryChina
CityXiamen
Period11/10/2511/10/28

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Jin, Y., & Kimura, S. (2011). Multi-stage power gating based on controlling values of logic gates. In Proceedings - 2011 IEEE 9th International Conference on ASIC, ASICON 2011 (pp. 79-82). [6157127] (Proceedings of International Conference on ASIC). https://doi.org/10.1109/ASICON.2011.6157127