Multi-stage power gating based on controlling values of logic gates

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the CMOS technology scales down, low power technologies have been expected to reduce leakage power of the CMOS device. Controlling value based power gating is a fine-grained active mode power gating approach using the controlling values of logic elements. In this method, one input of a logic gate taking the controlling value stops the power supply to the logic blocks generating other inputs. In this paper, we propose a multi-stage power gating method based on controlling values by stopping the power supply of several gates in the power controlled blocks. Experimental results show that the proposed approach increases the number of power-off elements by 26.7% in average compared with the single-stage power-gating method.

Original languageEnglish
Title of host publicationProceedings of International Conference on ASIC
Pages79-82
Number of pages4
DOIs
Publication statusPublished - 2011
Event2011 IEEE 9th International Conference on ASIC, ASICON 2011 - Xiamen
Duration: 2011 Oct 252011 Oct 28

Other

Other2011 IEEE 9th International Conference on ASIC, ASICON 2011
CityXiamen
Period11/10/2511/10/28

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Logic gates

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Jin, Y., & Kimura, S. (2011). Multi-stage power gating based on controlling values of logic gates. In Proceedings of International Conference on ASIC (pp. 79-82). [6157127] https://doi.org/10.1109/ASICON.2011.6157127

Multi-stage power gating based on controlling values of logic gates. / Jin, Yu; Kimura, Shinji.

Proceedings of International Conference on ASIC. 2011. p. 79-82 6157127.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Jin, Y & Kimura, S 2011, Multi-stage power gating based on controlling values of logic gates. in Proceedings of International Conference on ASIC., 6157127, pp. 79-82, 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, 11/10/25. https://doi.org/10.1109/ASICON.2011.6157127
Jin Y, Kimura S. Multi-stage power gating based on controlling values of logic gates. In Proceedings of International Conference on ASIC. 2011. p. 79-82. 6157127 https://doi.org/10.1109/ASICON.2011.6157127
Jin, Yu ; Kimura, Shinji. / Multi-stage power gating based on controlling values of logic gates. Proceedings of International Conference on ASIC. 2011. pp. 79-82
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